The newest member of Pentek’s Jade family of XMC FPGA modules is an L-band RF tuner based on Xilinx’s Kintex UltraScale FPGA with two 400-MHz analog-to-digital converters (ADCs). The Jade model 71891 is designed for direct connection to SATCOM or communications system L-band signals. According to Pentek, the Jade family’s architectural upgrade to the Kintex FPGAs brings higher performance, 20% lower power consumption, and 35% lower cost compared to the previous generation.
An SSMC connector on the module’s front panel accepts L-band signals between 925 MHz and 2175 MHz, typically from an L-band antenna or a low-noise block (LNB). With its programmable low-noise amplifier, the module’s Maxim MAX2121 tuner IC directly converts these L-band signals to IF or baseband using a broadband I/Q analog downconverter followed by 123-MHz low-pass, anti-aliasing filters. The two analog tuner outputs are digitized by two Texas Instruments ADS5474 400-MHz, 14-bit ADCs to capture the full 123-MHz bandwidth.
For best performance, the analog outputs of the MAX2121 can be used in the IF mode instead of the analog baseband I+Q mode. In this case, each ADC digitizes an IF signal and then delivers it to a digital downconverter (DDC) to produce perfectly balanced, complex I+Q digital baseband samples for enhanced demodulation performance. An additional benefit of using the IF analog output mode is that two independent ADC and DDC channels are now available for digitizing and downconverting two signals with different center frequencies and bandwidths.
The Model 71891 features two acquisition IP modules to easily capture and move data. Each module can receive data from either of the two ADCs or a test signal generator. Each acquisition IP module contains a powerful DDC IP core with decimation values from 2 to 64k, covering a wide range of signal bandwidths. Because of flexible input routing within the acquisition IP modules, many different configurations can be achieved including one ADC driving both DDCs or each of the two ADCs driving its own DDC.
Because it’s based on the Xilinx Kintex UltraScale FPGA, the Jade architecture now raises DSP performance by over 50% compared to the previous family while also reducing cost, power dissipation, and weight. The FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data unpacking, gating, triggering, and memory control.
To facilitate application development, Pentek's Navigator Design Suite includes the Navigator FDK (FPGA Design Kit) for custom IP and Navigator BSP (Board Support Package) for creating host software applications. The Navigator FDK includes the board’s entire FPGA design as a block diagram that can be graphically edited in Xilinx's Vivado tool suite, with full source code and documentation. Developers can integrate their IP along with the factory-installed functions or use the Navigator kit to replace the IP with their own. The Navigator FDK Library is fully AXI-4 compliant, providing a well-defined interface for developing IP or integrating IP from other sources.
Pentek's Navigator BSP provides a full suite of high-level, C-callable libraries that support all features of the Model 71891 and demonstrate all its functional modes with examples. The software package is provided with complete source code allowing the user to modify and integrate this functionality into the end application. The Navigator BSP also includes an extremely useful Signal Viewer utility that allows developers to view digitized signals from the output samples of any DDC in time and frequency domain.
The Jade Model 71891 XMC is designed for commercial, rugged, or conduction-cooled operating environments. It is also available packaged in several form factors, including 3U and 6U VPX (Models 54891 and 57891/58891); 3U and 6U cPCI (Models 72891/73891/74891); AMC (Model 56891); and PCIe (Model 78891). Additional FPGA, ADC, and LVDS FPGA I/O options are available. Delivery is 8 weeks ARO.
Pentek, www.pentek.com