Fujitsu Offers PLL At Wireless Show

Related To:

April 7, 2004

Fujitsu Microelectronics America (Sunnyvale, CA) introduced three single-serial-input phase-locked-loop (PLL) frequency synthesizers at the recent Wireless Systems Design Conference & Expo (San Jose, CA). Designed for wireless applications, the PLLs feature low phase noise and extremely low power consumption. The new lineup includes models MB15E05SR, MB15E06SR, and MB15E07SR, with frequency ranges to 2.0, 3.0, and 2.5 GHz, respectively. The PLLs feature a separate charge pump power supply pin and the ability to go as high as +5.5 VDC, making them ideal for a broad range of wireless applications. For example, model MB15E07SR has a 2.5-GHz prescaler and a voltage supply range of +2.7 to +5.5 VDC, drawing just 7.2 mA current at +3.75 VDC. Designed for GSM and PCS base stations, the PLL incorporates a selectable charge pump that delivers a well-balanced output current between null1 and null4 mA. For more on the PLLs, visit the company's web site at http://lists.planetee.com/cgi-bin3/DM/y/eA0JtlqC0Gth0BG6K0Al . For a complete wrap-up of the 2004 Wireless Systems Design Conference & Expo, see the April issue of Microwaves & RF magazine.

Fujitsu --> http://lists.planetee.com/cgi-bin3/DM/y/eA0JtlqC0Gth0BG6K0Al

About the Author

Jack Browne

Technical Contributor

Jack Browne, Technical Contributor, has worked in technical publishing for over 30 years. He managed the content and production of three technical journals while at the American Institute of Physics, including Medical Physics and the Journal of Vacuum Science & Technology. He has been a Publisher and Editor for Penton Media, started the firm’s Wireless Symposium & Exhibition trade show in 1993, and currently serves as Technical Contributor for that company's Microwaves & RF magazine. Browne, who holds a BS in Mathematics from City College of New York and BA degrees in English and Philosophy from Fordham University, is a member of the IEEE.