Phase noise is an interference source and a dynamic range limit in communications systems. The noise can cause interference both “in-channel” for systems with modulation terms close to the carrier, or further from the channel being used in what’s often referred to as adjacent or alternate channel performance.
As communications systems are often expected to operate under large link loss conditions, often exceeding 130 dB and sometimes exceeding 150 dB, it’s necessary for them to have a low noise floor, sometimes at the limit of the physically possible. Deliberately designing for this particular kind of noise control is not often taught in electrical engineering curricula, even at the graduate level. Also, in recent years, the technology of synthesizer design has changed dramatically, with noise control becoming more based on in-loop bandwidth suppression of voltage-controlled oscillator (VCO) noise, allowing noisier on-die VCOs to still deliver excellent performance. This noise suppression is particularly important with the high loop bandwidths enabled by modern sigma-delta synthesizer ICs using the latest high-frequency, low-noise crystal reference oscillators.
This article is the second, moderately longer online version in our low-noise synthesizer design series. A still more complete version will be posted on the Publications page at www.longwingtech.com. The first article (Ref. 1) covered basic design for functionality and stability. This second article, as well as the upcoming Part 3, will extend the basic methods to specifically cover designing for minimum phase noise. It focuses on noise sources outside the synthesizer integrated circuit (IC), such as the VCO and the various loop-filter forms.