A Look at the Kria Robotics Starter Kit

May 15, 2023
Editor Bill Wong examines the MPSoC solution for robots using a time-sensitive-networking example.

This video appeared in Electronic Design and has been published here with permission.

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The video (above) provides a quick overview of the Kria Robotics Starter Kit (Fig. 1) from Xilinx, now part of AMD. The platform can target any embedded application that can utilize the flexibility of a multiprocessor system-on-chip (MPSoC) that combines a hard-core compute environment with a configurable FPGA. I tried out the various tools and the time-sensitive-networking (TSN) demo. 

The kit is based on the Kria SOM (system-on-module) that's available in industrial and commercial versions (Fig. 2). The SOM is built around a AMD Zynq UltraScale+. The module adds power management and additional memory. It requires a carrier board, which is included with the kit.

The module is designed for prototyping, hence the addition of headers that are Raspberry Pi-compatible and PMOD-compatible. There's also a DisplayPort output, multiple USB 3.0 sockets, and two industrial Ethernet ports that can handle TSN and two regular Ethernet ports. The SFP socket is for high-speed networking. 

The SOM includes 6 GB of DDR4 memory, a 16-GB eMMC flash drive, a 512-Mb SPI for FPGA configuration, and a TPM 2.0 security module. All of the interfaces are exposed on a pair of 240-pin connectors on the back of the module. Fan and heatsink are optional and their use depends on the how fast and what applications will be running on the system. 

The processing system includes a quad-core Arm Cortex-A53, a dual-core Arm Cortex-R5F, and a Mali-400 MP2 GPU. The video codec unit (VCU) can handle up to 32 streams with a total resolution up to 4Kp60.

Time-Sensitive-Networking Demo 

TSN is an Ethernet standard that allows the clocks of multiple platforms to be synchronized and enables deterministic transmission of data through the network. The TSN demo actually required kits, which AMD provided. It's also possible to hook up another TSN-capable node such as a PC. TSN support is supplied by AMD as a preconfigured subsystem. The github project has all of the details. 

The configuration isn't difficult, but I cheated and let AMD provide a pair of microSD cards with the software set up for the demo (Fig. 3). I've run through the setup for using Linux and the Robot Operating System (ROS) on a single system, so I know it's not difficult, only tedious—it helps to follow the directions closely. 

You can read about the details on github. Essentially, the system is set up to run Linux and configure the hardware. The synchronized timing is shown on the oscilloscope on my Digilent Analog Discovery Studio. The PC scope/logic-analyzer application is connected via USB. The scope is handy to view the synchronization process and highlight the stability of the system once it's in lockstep. 

The one ability highlighted by this demo and the others like the camera processing and the ROS 2 perception demo is they can utilize the FPGA without needing to develop the configuration itself, since most developers are working on the software side or creating hardware that will interface with the FPGA or processing subsystem. I was able to run the demo and understand the support and configuration without worrying about the FPGA details. 

Development Tools

AMD offer major toolsets for those working with the Kria/Zynq platform. The first is Vivado, and the second is Vitis. Vivado targets the FPGA and other composable support found on other AMD SoC solutions like the Adaptive Compute Acceleration Platform (ACAP), Versal

Vivado Overview

Vivado is obviously for those who have the know-how and desire to tweak the FPGA and other configurable hardware to provide significant performance improvements or deliver results using less power. The FPGA can implement logic that can operate in parallel, which can be much faster than any software. 

I won't get into the details, but Xilinx's support enables multiple functional blocks developed with Vivado to be combined easily using the Vitis framework. 

Vitis Overview

Vitis is an open-source platform developed by AMD to streamline application development. It supports two major components: platforms and systems (Fig. 4). The platforms define how the underlying hardware is configured and can utilize information provided by Vivado. 

Vitis supports software development, which in turn can access the FPGA support. This is how the sample application and applications in general are able to utilize the prepacked FPGA configurations. The following is a quick overview of Vitis. 

Closing Thoughts

This was an interesting exercise because the demo is actually complex in terms of what's involved. However, it does expose more of the functionality available when using the platform, which is important because many will be utilizing third-party FPGA support rather than building from scratch using Vivado. More modules are being added; some are free or open source while others are limited or demo versions with full functionality available via a license. 

The kit itself is very useful as a development tool. The PMOD connections come in handy since many devices and sensors are available, but they're not necessarily suitable for rugged environments. Then again, moving from prototyping to production will normally involve a custom carrier board, which is essentially the intent of the SOM approach. 

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