Over the past several decades, channel counts and bandwidths in wireless systems have steadily increased. The driving factors for these modern telecommunication, radar, and instrumentation systems are their data rates and overall system-performance requirements. However, these requirements also have increased power envelopes and system complexities, making power density and component-level features more important.
To help address some of these limitations, the semiconductor industry has integrated more channels on the same silicon footprint, thereby reducing watt-per-channel requirements. In addition, semiconductor companies are integrating more complex features into digital front ends that ease the off-chip hardware design. These sorts of integrations have historically been achieved in an application-specific integrated circuit (ASIC) or field-programmable gate array (FPGA) fabric. Features can range from generic components like filters, downconverters, or numerically controlled oscillators (NCOs), to more complex application-specific operations.