In recent years, we’ve seen the demonstration of several 60-GHz CMOS building blocks and integrated receivers13-15 as well as publishing of complete 60-GHz integrated receivers.6,16,17 The amplifier described here comprises a CMOS transistor, transmission lines, ac-coupling and supply-ground bypass capacitors, resistors, RF ground-signal-ground pads, and dc pads.
This work explores the challenges facing the design and implementation of a 60-GHz power amplifier (PA) in standard 90-nm CMOS processes. We’ll present a low-loss power combining technique, which takes advantage of millimeter-wave (mmWave) amplifier topologies, to implement four power amplifiers in a standard 90-nm, 1-V CMOS process. The resulting design offers record performance in terms of 1-dB compression and saturation output power.