Digital frequency discriminators (DFDs) provide accurate frequencymeasurement data on pulsed and CW signals received over wide instantaneous RF bandwidths. They typically cover wide bandwidths, such as 50 to 500 MHz, 0.5 to 2 GHz, 2 to 6 GHz, 6 to 18 GHz, and 2 to 18 GHz, but are rare above 18 GHz. One of the limiting factors to achieving DFDs above 18 GHz is the problem of excess correlator phase error. What follows is a review of basic DFD capabilities and limitations, and a report on work to extend their usefulness above 18 GHz.

Figure 1 shows that DFDs come in many forms, depending on the application and performance required. DFDs are an essential building block in more complex systems, such as instantaneous-frequencymeasurement (IFM) receivers, which also include threshold circuits, an RF amplitude quantizer, RF envelope pulse-width measurement capability, and time-of-arrival (TOA) processing.

A DFD usually operates in support of a widebandwidth electronicwarfare (EW) system. Figure 2 is a simplified block diagram, showing the DFD microwave components, and reducing a complex EW system to just the essentials of an antenna, a linear RF amplifier, and a bandpass filter. DFD microwave circuits consist of a limiting RF amplifier, a phase-matched RF power divider, and (typically) a seven-correlator array, with each correlator associated with a RF delay line and delay times arranged in a binary sequence. Each microwave correlator provides both sin(θ) and cos(θ) video outputs, where θ is the relative phase between the delayed and nondelayed RF inputs to the correlator. Since the delay time associated with each microwave correlator is constant (in seconds), the relative phase between the delayed and nondelayed correlator inputs (θ) will appear to rotate as the RF input frequency is changed. The correlator output is periodic in frequency, with the period (the input frequency span required to produce 2π radians of rotation) given as:

where:

f_{p} = the frequency period of the correlator (in Hz) and

D = the delay time (in s).

The shortest RF delay line (identified as 1X in Fig. 2) is selected to provide just 360 deg. of phase rotation over the design unambiguous bandwidth of the DFD. The longest RF delay line (64X in Fig. 2) sets the desired RF measurement accuracy and resolution. The intermediate correlators (2X through 32X) are only present to resolve the ambiguities between the 1X and 64X correlators. The 1X through 32X correlators are provided with comparator (TTL) outputs; the 64X correlator is the only correlator employing analog video outputs. If this DFD were configured with only TTL comparators, simple decoding would produce an 8-b output data word. Using only comparators, N correlators will produce N + 1 output data bits. Using video amplifiers and digitizers on the longest delay correlator permits the expansion of frequencymeasurement resolution to 12 b or higher output resolution. The typical seven-correlator-array DFD design illustrated provides a 12-b output frequency data word; DFDs with as few as one and as many as ten correlators have been produced. Due to VSWR and other errors, the correlators are subject to phase-measurement errors. With appropriate decoding, the basic design of Fig. 2 allows each correlator to produce phase errors (relative to the adjacent correlator) to 45 deg. without causing ambiguity errors. If a similar design were to be implemented using just four correlators (1X, 4X, 16X, and 64X), the phase margin would be reduced to 22.5 deg. The problem with this abbreviated (4:1 ratio) set of correlators becomes apparent in the higher-frequency bands. The expected RMS phase error of a highfrequency correlator is approximately 6 deg. Therefore, three standard deviations is 18 deg. Over frequency and temperature this is very close to the maximum allowed phase margin of 22.5 deg. and ambiguity errors are likely.

Since RF frequency-measurement accuracy and resolution is dependent on the characteristics of the longest delay time correlator (64X, for example), it is possible to focus on the RF path including the RF preamplifier (setting the system noise figure) and the bandpass filter (setting the noise bandwidth) for performance improvements. The phase-matched power divider of Fig. 2 is replaced by a Wilkinson power divider, splitting RF inputs into delayed and nondelayed paths. The correlator simply multiplies the RF from the two paths, with the resultant video signals lowpass filtered (Fig. 3). Using this simple model, the RF input spectrum to the Wilkerson power divider is as shown in Fig. 4. The effect of the RF limiting amplifier has been temporarily ignored.

With the system model of Fig. 3 and the input spectrum of Fig. 4, it is possible to compute the measured RMS RF frequency error as a function of the RF input signal-to-noise ratio (SNR), the time delay associated with the correlator, the center of the RF passband, and the RF input bandwidth:

where:

F_{e} = the frequency-measurement error (in MHz RMS),

B_{w} = the RF bandwidth (in MHz),

B_{v} = the video bandwidth (in MHz),

F_{o} = the RF bandpass center frequency (in MHz),

D = the time delay between the RF inputs to the correlator (in µs), and

SNR = the input signal-to-noise-power ratio (dimensionless).

These relationships permits the calculation of the delay time needed to produce a desired frequency measurement accuracy over the specified RF bandwidth. Figure 5 shows the measured frequency accuracy for a typical DFD. The computation predicts a Gaussian noise distribution, even though Fig. 5 apparently shows periodic errors. These periodic errors are due to VSWR effects within the correlator's microwave circuits. In addition to the thermal-noise-based frequencymeasurement errors, three other significant error sources exist: correlator VSWR, quantization noise, and ambiguity errors.

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The internal VSWR of the microwave correlator produces a phase-measurement error: this is additive to the thermal noise errors, present in the conversion of RF noise to video noise. Typically, a 2-to-6-GHz correlator exhibits a 4.5-deg. RMS error while a 6-to-18-GHz (or 2-to-18-GHz) correlator produces an approximate 6-deg. RMS phase error.

Since a DFD produces a digital output, it suffers a quantization error proportional to the mean frequencymeasurement cell width. The quantization error can be reduced by increasing the DFD frequencymeasurement resolution. The relationship between the cell width and quantization error is:

where:

QE = the quantization noise (in MHz, RMS) and

CW_{n} = the nominal output data frequency cell width (in MHz).

An ambiguity error occurs when the phase error between adjacent correlators exceeds the phase margin allowed in the decoding process. This error is more serious than most, as it tends to be large and repeatable. For example, if the DFD is designed to produce 1-MHz frequency resolution, a breakdown in ambiguity resolution may produce a sequence of frequency measurement errors of 128 MHz, 256 MHz, or some other binary multiple of the frequency measurement resolution. Early DFD designs employing a 4:1 ratio between correlator delays were limited to a phase margin of just 22.5 deg. If a 6-to-18-GHz DFD were implemented with this design, three standard deviations of the correlator phase error comes to 18 deg., which is very close to the phase margin limit. For this reason, early DFD designs were usually specified to allow the production of some ambiguity errors. Modern designs, employing the 2:1 ratio of adjacent correlator delays, do not permit ambiguity errors within the design dynamic range.

All of these error sources can be summarized on a single plot where the performance of a prototype DFD design can be computed and evaluated over a given input RF SNR range (Fig. 6). A special analysis program works with key design parameters, including unambiguous bandwidth, RF bandwidth, video bandwidth, number of correlators, output frequency measurement resolution, and estimated correlator phase error, and computes the conversion of RF noise to video noise (A in Eq. 2). The computation adds estimated correlator phase error (B in Eq. 3) and quantization error (C in Eq. 3). These errors are added as a root sum of squares (RSS) calculation. Summing all of the error sources allows the program to plot the expected RMS error (E) as a function of input RF SNR. The ambiguity error boundary is computed, using Eq. 1 to convert frequency error to phase error and setting the RF SNR boundary when the summed phase error exceeds 23.08 deg. This corresponds to 1.95 times the standard deviation of phase, or a 5-percent probability of exceeding the 45-percent phase margin.

The plot of thermal noise errors (A) has a double bend in the region of 0-dB RF SNR. This takes into account that, at negative RF input SNR, the action of the limiting RF amplifier (Fig. 2) suppresses the signal by noise of 1.05 dB higher in level. At a positive RF SNR, the same function suppresses the noise by signal amplitude that is 3 dB higher.

To validate the data of Fig. 6, a production DFD was tested, using 500 frequency steps over the design bandwidth (2 to 6 GHz), in 1-dB steps of RF input SNR, from +15 to ?10 dB. This result is shown in Fig. 6 as plot F. At the higher RF SNR inputs, the results are slightly better than the prediction, indicating that the correlator VSWR is slightly better than the estimate. As the input RF SNR is reduced, the expected plot E and measured plot F are closer to agreement. Below ?2 dB RF SNR, as the ambiguity error boundary is approached, the measured errors become large. As a ?10-dB RF SNR is approached, the output digital data has lost any connection to the RF input signal and the DFD is, essentially, a digital-random number generator.

Achieving these results requires extreme control of the system RF gain between the system antenna and the DFD input. Consider, for example, that the RF gain path preceding the DFD is perfectly flat over frequency, except for a small RF band with 2-dB loss, relative to the rest of the operating bandwidth. In the region of this 2-dB loss, the RF level into the system must be increased by 2 dB to utilize the DFD's full sensitivity. For this reason, consider that the required full-band sensitivity of the DFD, installed in the system, corresponds to the DFD minimum operating RF SNR, plus the peak-topeak gain variation preceding the DFD.

Having entered the design unambiguous bandwidth and the number of correlators, the program computes the length of the longest RF delay line (the 64X correlator) as 12.50 ns, shown in Fig. 6 as G. Having also specified that the video bandwidth is 10 MHz, corresponding to a 10-to-90-percent video rise time of 35 ns, the program computes the minimum triggered RF pulse width H as the sum of the longest RF delay and the video rise time, at 47.5 ns. This is the minimum RF pulse width if the DFD is triggered synchronously with the input RF envelope. If the DFD is a clocked design, then the minimum RF pulse width for 100-percent probability of intercept (POI) is the sum of the minimum triggered RF pulse width and the clock period.

To validate this concept of POI versus RF pulse width, the data of Fig. 7 was taken on a 2-to-8-GHz DFD. In this case, the long delay was 7.81 ns and a 40-MHz system sampling clock was employed. The correlator output video bandwidth was set to 10 MHz. The minimum triggered RF pulse width was computed as 42.81 ns; the 100-percent POI pulse width then becomes 67.81 ns.

Observing Fig. 7, when a threshold input signal (?60 dBm) is applied, the transition from the minimum triggered RF pulse width to 100-percent POI is almost linear. Increasing the RF input signal level improves the POI for short pulses, primarily because of video stretching at the higher RF input levels.

Finally, returning to Fig. 6, this computer program also calculated the lowest RF SNR such that, given that the input frequency is in the center of an output frequency cell, what is the minimum RF input SNR to assure that the data report is within that cell with probability 0.9. This appears in Fig. 6 as I.

This proprietary computer program provides a huge boost in evaluating DFD designs. Once the required RF bandwidth and desired output frequency accuracy and resolution are established, the required delay time can be computed. This will then establish the number of correlators needed to produce the desired result.

Although the triggered DFD design, where frequency data is strobed synchronously with the RF envelope, produces the best combination of POI and minimum RF pulse width, most modern DFDs are clocked rather than triggered. In a clocked DFD design, the RF frequency is continuously sampled at fixed intervals. This permits synchronization of measured frequency data with RF amplitude and angle of arrival (AOA) data. The clocked design also supports synchronous RF SNR estimates internal to the DFD where, along with providing measured frequency data, the DFD simultaneously estimates RF SNR at the time of the RF frequency sample. Instantaneous estimation of the RF SNR eliminates the need for noise riding thresholds and supports other features, such as leading-edge pulse on pulse, or pulse on CW, triggering, and multipath blanking. **Wide Band Systems, Inc., 389 Franklin Ave., Rockaway, NJ 07866; (973) 586-6500, FAX: (973) 627-9190, Internet: www.widebandsystems.com. **