Mercury Systems
1022 Mw Mercury 5560 Fpga Coprocessing Board Promo

FPGA Co-Processing Board is First Powered by Versal HBM Platform

Oct. 5, 2022
The board brings massive edge-processing capabilities to EW and spectrum processing applications, resulting in split-second data advantages.

The Overview

In its new Model 5560, Mercury Systems offers a 3U OpenVPX, SOSA-aligned co-processing board claimed as the first to be powered by the AMD Xilinx Versal HBM adaptive compute-acceleration platform with integrated high-bandwidth memory (HBM). The Model 5560 is the new flagship in Mercury’s portfolio of co-processors that use HBM technology, joining the Model 5585 and 5586 modules.

Who Needs It & Why?

Electronic-warfare and spectrum processing applications used by land-, air-, and sea-based platforms must capture input signals, process them, and deliver output signals on extremely short timelines. Near-peer adversaries are investing in capabilities to achieve split-second information advantages in warfare, and the United States and its allies must rely on trusted, secure processing to maintain technological superiority.

Under the Hood

Many existing defense systems use field-programmable gate arrays (FPGAs) as co-processors to accelerate data processing at the edge. However, they run into bottlenecks when data is transferred to memory that's positioned elsewhere on the board, which delays decision-making.

Mercury’s Model 5560 is directly integrated with the on-chip HBM via the Versal Programmable Network-On-Chip, resulting in up to an 8X increase in bandwidth and 63% lower power compared to a system using external memory. With gigabytes of HBM directly accessible by the Versal HBM adaptable engines, it can significantly increase the overall amount of data pushed through the system.

It’s possible to process massive amounts of data at the edge with the Model 5560, thanks to features such as:

  • 16 GB of Versal high-bandwidth memory
  • Versal HBM series delivers memory bandwidth of up to 820 GB/s, 8X the bandwidth of DDR5 memory at 63% lower power
  • Four 100GigE high-speed optical data pipes for an aggregate data-throughput rate of 50 GB/s
  • Navigator FPGA design kit (FDK) and board support package (BSP) for operational control and IP development