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EDA Keeps Moore’s Law Afloat

April 2, 2021
The EDA industry, as it has for decades, continues to provide the tools that make designers’ jobs possible, even as it broadens its scope to full system level.

Back in 2012, when I was the electronic-design-automation (EDA) technology editor at our sister publication, Electronic Design, cutting-edge semiconductor process technology was at the 22-nm process node. Industry observers like myself wondered when Moore’s Law would finally succumb to a) physics, b) photolithography limitations, or c) both. Indeed, a technical expert at the Defense Advanced Research Projects Agency (DARPA) predicted in 2013 that Moore’s Law would be dead by 2022.

Today’s most advanced process technology yields 7-nm feature sizes, and Intel’s roadmap says we’ll see the 5-nm node by 2024. But does that mean the number of transistors will continue to double for the same silicon-substrate area every two years, as Gordon Moore forecast in 1975? The jury’s still out on that; most high-end foundries don’t even count transistors anymore.

It’s fair to say that the law still holds for some types of high-end chips, like smartphone SoCs, but not others. However, even if the law isn’t upheld in its strict sense through process technology, it’s not a foregone conclusion that it can’t be upheld with respect to overall functionality and processing power through other means.

That’s where the EDA industry comes in. In a recent series of discussions with major EDA vendors, I learned of some of their strategies to keep Moore’s Law alive.

For one thing, the EDA vendors’ approach is trending toward a holistic system-level methodology. These days, when EDA vendors speak of system-level design, it’s not so much about high-level synthesis or verification from behavioral models, but more in terms of folding into the design process aspects of overall system design that perhaps have been siloed historically. I’m thinking of, say, electromagnetic issues, thermal analysis, and packaging.

A big element, of course, is system software, which once was nearly totally divorced from hardware design. Now, software is the differentiator in chip design, not hardware. There are burgeoning concerns like silicon lifecycle management, artificial intelligence, and machine learning. Modern—and future—EDA toolchains will bring many domains together in multi-discipline simulation and analysis that accounts for all of them simultaneously.

The EDA industry is keenly aware that designers need, and miss having, a full solution approach. When a vendor has a broad array of tools and IP that touch many and varied facets of design, the design teams in each industry vertical—e.g., automotive/ADAS, mobile/5G, IoT, aerospace/defense—need help making sense of that tool palette. This certainly applies to the connectivity aspects of the system, especially if that connectivity is wireless, but it also includes elements such as low-power design, security, and safety. EDA vendors are trending toward offering more tailored toolsets that address all of these concerns in a way that’s most meaningful and efficient for the customer.

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