Zynq Rfsoc Dfe

Xilinx’s Zynq RFSoC DFE Addresses Mass 5G Radio Deployments

Oct. 27, 2020
A new class of adaptive radio platforms combines flexibility for evolving 5G standards and a hardened radio digital front-end for performance, power, and cost effectiveness.

As the 5G rollout progresses, several challenges present themselves: 5G means increasing bandwidth and compute requirements must be provided with less power and at lower cost. Use cases for 5G are diverse, from enhanced mobile broadband to massive machine-type communications. 5G needs also to be ultra-reliable and deliver low latencies.

To meet those requirements for 5G radios, Xilinx’s new Zynq RFSoC digital front-end (DFE) combines hardened DFE blocks with a programmable, adaptive SoC that fits all use cases across the 5G low-, mid-, and high-band spectrum. Xilinx expects the devices to meet 2nd-wave 5G New Radio requirements with double the performance per watt of the company’s earlier front-end implementations.

Adaptability in 5G NR front ends is made even more critical by the fact that 5G standards continue to evolve even as the rollout commences. Front ends must scale to meet the needs of OpenRAN (O-RAN) and emerging disruptive business models. The Zynq RFSoC DFE’s hardened application-specific blocks bring high performance and power savings. Meanwhile, the device’s flexibility, which derives from integrated programmable adaptive logic, ensures a future-proof implementation as 5G 3GPP and O-RAN radio architectures evolve.

According to Xilinx, the Zynq RFSoC DFE offers twice the performance-per-watt compared to its prior generation and scales from small cell to massive MIMO macrocells. The solution is the industry’s only direct RF platform that enables carrier aggregation/sharing, multi-mode, multi-band 400-MHz instantaneous bandwidth in all FR1 bands, and emerging bands up to 7.125 GHz. When used as a millimeter-wave intermediate-frequency transceiver, it provides up to 1,600 MHz of instantaneous bandwidth. Zynq RFSoC DFE is architected such that designers can bypass or customize the hard IP blocks. For example, customers can leverage Xilinx’s digital predistortion (DPD) that supports existing and emerging GaN power amplifiers, or insert their own unique DPD IP.

Zynq RFSoC DFE design documentation and support is available to early access customers, with shipments expected during the first half of 2021.

Xilinx, www.xilinx.com/rfsoc-dfe

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