Keysight Technologies has broadened its collaboration with Synopsys with the integration of its PathWave RFIC Design (GoldenGate) that includes Synopsys’s Custom Compiler design environment and PrimeSim circuit simulation solutions. The integration will enable designers to validate complex RF and mmWave design requirements for 5G/6G system-on-chip (SoC) and subsystem designs in the Synopsys Custom Design Family.
Who Needs It & Why?
RFIC designs used for wireless data transmission, such as those in transceivers and RF front-end components, are gaining in complexity. This is especially true as designers of next-generation wireless systems look to enhance their capabilities with higher bandwidth, the ability to connect to more devices, lower latency, and greater coverage area. To achieve these goals, RF designers will want to simulate and evaluate RF performance to greater levels of accuracy.
The integration of PathWave RFIC Design (GoldenGate) simulation software, which models complex ICs, with Synopsys Custom Compiler that's part of the Synopsys Custom Design suite, addresses this challenge: It enables designers to achieve power and performance optimizations and efficiently deliver 5G and 6G designs.
Under the Hood
The native integration of Keysight's PathWave RFIC Design (GoldenGate) with Synopsys' Custom Compiler targets end-to-end workflows for increasingly complex wireless designs. Specifically, designers are able to perform harmonic balance and envelope simulations. It also affords access to Keysight's Virtual Test Benches, which reliably compute error-vector magnitude (EVM) and adjacent-channel power ratio early in the chip design and verification process.
In the integration of these tools, designers gain an enterprise-grade solution for RF and wireless design, delivering the following key benefits:
- Complementary, high-capacity RFIC simulation solutions to validate complex SoCs with accurate electromagnetic (EM) models for RF and mmWave design blocks.
- Improved productivity with defined common testbenches, measurements, and simulation setup.
- Ability to meet complex RF and mmWave design requirements to facilitate the creation of 5G and 6G SoC and subsystem designs.
- Compact test signals and fast distortion EVM simulations for both design and verification of RF circuits using modulated signals.
- An energy-efficient design that improves power optimization, thermal/mechanical heat stress, and battery life.
This integration continues Keysight's strategic partnership with Synopsys. The company recently merged its PathWave RFPro with the Synopsys Custom Compiler design environment, enabling rapid and accurate design of wireless chips using TSMC's N6RF Design Reference Flow.