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Low-Noise PLL Extends to 5 GHz

March 4, 2015
This integer-N frequency synthesizer builds on silicon CMOS semiconductor technology to achieve low-noise signals to 5 GHz from a compact, radiation-hardened CQFP package.
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Frequency synthesizers are widely used both in ground and in space, where they must remain tolerant to different types of radiation. A new solution from Peregrine Semiconductor, the model PE97240, is a radiation-hardened integer-N phase-lock loop (PLL) that is offered in a compact surface-mount package that is capable of generating low-noise signals through 5 GHz. In addition to achieving low phase noise, the device uses very low power, typically drawing only 75 mA current from a +2.7-VDC supply. It is designed for use at operating temperatures from -40 to +85°C.

Model PE97240 is an integer-N frequency synthesizer with low noise performance to 5 GHz.

The model PE97240 PLL (see figure) is fabricated on the company’s proven UltraCMOS semiconductor technology, which features silicon-on-insulator (SOI) circuitry on a sapphire substrate. Much like the firm’s model PE42020 single-pole, double-throw (SPDT) surface-mount switch introduced one month earlier, this device benefits from the linearity and low noise of this semiconductor process. The PE97240 PLL was designed for commercial space applications, featuring radiation tolerance to 100 krad total ionizing dose (TID) and excellent immunity to single-event-effect (SEE) phenomena. This enables this device to perform reliably for 10 years or more in the harsh radiation conditions of space.

The PLL includes a prescaler with selectable 5/6 or 10/11 dual-modulus operation. The compact 44-lead ceramic-quad-flat-pack (CQFP) package also includes a reference divider, counters, phase comparator, and control logic. The counter values can be programmed by means of a serial interface or under direct-wired control. The dual-modulus prescaler divides an input from a voltage-controlled oscillator (VCO) and the counters work with the control logic and the phase-frequency detector to generate control signals to stabilize output signals over the respective ranges of each division ratio.

When used with the 5/6 dual modulus, the PE97240 provides an output frequency range of 800 MHz to 4 GHz, with maximum input power of +7 dBm. When used with the 10/11 dual modulus, the PLL operates at frequencies from 800 MHz to 5 GHz with maximum input power of +7 dBm. The device works with a phase detector comparison frequency to 100 MHz.

This space-ready PLL boasts very good spectral purity, with low phase noise when using either dual modulus. For example, with the 5/6 dual modulus, the typical single-sideband (SSB) phase noise measured for a 3-GHz carrier is -100 dBc/Hz at 100 Hz offset from the carrier; -109 dBc/Hz at 1 kHz offset from the carrier; -116 dBc/Hz at 10 kHz offset from the carrier; and -118 dBc/Hz at 100 kHz offset from the carrier. When using the 10/11 dual modulus, the SSB phase noise is typically -98 dBc/Hz at 100 Hz offset from the carrier; -104 dBc/Hz at 1 kHz offset from the carrier; -111 dBc/Hz at 10 kHz offset from the carrier; and -117 dBc/Hz at 100 kHz offset from the carrier.

The model PE97240 PLL synthesizer is supplied in a RoHS-compliant, hermetic CQFP package. To assist specifiers interested in incorporating the device in their system, Peregrine offers an evaluation board with Universal-Serial-Bus (USB) interface that helps demonstrate the optimum phase-noise performance of the PLL.

This evaluation board is fabricated with high-frequency 4350B printed-circuit-board (PCB) material from Rogers Corp. with relative dielectric constant (εr) of 3.48 and two inner layers of FR-4 PCB material. The board is well grounded for reliable and predictable performance when investigating the performance of the PE97240 PLL under the types of conditions that may be experienced in space-based applications. 

Peregrine Semiconductor Corp., 9380 Carroll Park Dr., San Diego, CA 92121; (858) 731-9400, FAX: (858) 731-9499

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This file type includes high resolution graphics and schematics when applicable.

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