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Software/CPU Duo Yields Efficient, Flexible Open RAN Implementations

Feb. 28, 2024
AMD’s EPYC 8004 chipsets and Parallel Wireless’s GreenRAN software platform combines to free Open RAN implementations from specific hardware requirements while also optimizing power efficiency.

This article is part of the TechXchanges: 5G Infrastructure and Software & Design Tools.

The Overview: Open RAN Collaboration

Parallel Wireless is collaborating with AMD to pair its GreenRAN hardware-agnostic software platform with AMD’s EPYC 8004 Series CPUs. The collaboration, it’s hoped, will boost Open RAN adoption as it reduces end-product power consumption and frees OEMs from hardware constraints.

Who Needs It & Why: Those Seeking Interoperability

The Open RAN movement, which promises to break the shackles that bind network operators to monolithic providers of radio-access network (RAN) equipment, continues to make progress. Yet, it still seeks solutions that will leverage hardware-agnostic RAN software with processors optimized for edge and telecom use cases.

Use of the AMD EPYC processors with Parallel Wireless’s GreenRAN software gives cellular network operators greater control over their components. The software operates seamlessly across various general-purpose CPUs, which represents a significant advance compared with earlier Open RAN solutions that were tied to specific hardware configurations. As a result, OEMs of Open RAN gain more of the openness and flexibility that was key to the Open RAN movement.

Under the Hood: Software & CPU Highlights

Both the software and the CPU bring attributes to the table that make the collaboration seem like a great fit as OEMs pursue the goals of innovation, scalability, and cost reductions.

Parallel Wireless’s GreenRAN software suite includes its xApps Suite, which provides software-driven layer switch-off and MIMO channel shutdown. These capabilities give operators the ability to fine-tune network activity based on demand. Together, they form an intelligence layer that optimizes network cluster power efficiency while maintaining quality of experience in both uplink and downlink.

The xApps also optimize the user MIMO configuration between MIMO 4x4 and MIMO 2x2 while maintaining user-equipment channel quality. Shutdowns are performed in near real time, which offers rapid response to frequent changes in network behavior. It all adds up to significant energy savings compared with older solutions.

For its part, AMD’s fourth generation EPYC 8004 Series (Siena) processors are optimized for edge and vRAN deployments. They contribute high core counts and energy efficiency to the overall solution, both of which are integral to enhancing the performance, scalability, and cost-effectiveness of Open RAN hardware. Core counts range from 8 to 64 and number of threads from 16 to 128. Maximum boost clock rates are 3.1 GHz with base clocks ranging from 2 GHz to 2.65 GHz.

In its collaboration with Parallel Wireless, AMD gains a stronger foothold in the telecom network market by aiding in the industry’s ongoing shift to more flexible and adaptable architectures.

Read more articles in the TechXchanges: 5G Infrastructure and Software & Design Tools.

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