Modern wireless applicationsare pushing complementary-metal-oxide-semiconductor (CMOS) devices to scale toward sub-1-µm gate lengths. For these devices to operate at higher frequencies, however, their gate-oxide thickness must be reduced and therefore operated at a lower power supply. A lot of research has been devoted to applications with a 3-V supply that is steadily reduced. Sub-1-V operation also has been investigated. Now, a 2.4-GHz sub-threshold CMOS low-noise amplifier (LNA) using current-reuse techniques has been presented by Lim Kok Meng, Ng Choon Yong, Yeo Kiat Seng, and Do Manh Anh of Singapore's Nanyang Technical University.
The LNA, which measures 1050 X 723 mm2, is designed with CHRT's 0.18-µm RF CMOS technology. While consuming just 650 µA from a 1-V supply, it achieves a high input third-order intercept of -2.7 dBm. With the pushpull configuration, it also displays a gain of 9.8 dB and a 3.6-dB noise figure. See "A 2.4-GHz Ultra Low Power Subthreshold CMOS LowNoise Amplifier," Microwave And Optical Technology Letters, April 2007, p. 743.
