Reference Designs Liven Wireless Show

Dec. 1, 2002
The 11th meeting of the Wireless Systems Design Conference & Expo offers a blend of traditional technical presentations as well as a fresh look at key reference designs.

Wireless circuit and system designers have been developing something of a tradition in February: furthering education at the risk of romance. If this connection seems vague, it is due to the timing of the Wireless Systems Design Conference & Expo, which began life in 1993 as the Wireless Symposium & Exhibition. The conference/exhibition, one of the leading educational events for wireless design engineers, has often been scheduled for the week of Valentine's Day, much to the dismay of interested partners. Fortunately, next year's show makes allowances for romance, since it is scheduled for February 24-27, 2003 in the San Jose Convention Center (San Jose, CA).

The Wireless Systems Design Conference & Expo ( promises something new in its 11th year: a reference design track. Such circuits are meant to closely approximate an actual application, such as a cellular handset or a wireless-local-area-network (WLAN) hub

For example, Andy Parolin, product line manager for SiGe Semiconductor (Ottawa, Ontario, Canada) will address the importance of careful physical layouts when optimizing the performance of a reference design. Parolin will use Bluetooth and WLAN examples to demonstrate some proven optimization methods, with consideration will be given to component selection, the length and positioning of circuit traces, and methods for eliminating ground feedback.

Aditya Agarwal of Fujitsu Microelectronics America (Santa Clara, CA) will explore a reference design focused on wireless broadband metropolitan area networks, notably a design in support of interoperable systems such as IEEE 802.16a and ETSI-BRAN HIPERMAN. The report will look in detail at the OFDM physical layer (PHY) solution that is common to both IEEE 802.16a and HIPERMAN, with details about a possible system-on-a-chip (SoC) implementation and the type of reference design needed to evaluate this solution.

Bernard Olivier of California Eastern Laboratories (Santa Clara, CA) will address reference designs for embedded Global Positioning System (GPS) applications, in partnership with customer eRide. The presentations will be based on the company's low-power, highly integrated GPS receiver IC and how this receiver can be incorporated into a variety of handheld and wireless applications.

This report has been meant to provide a quick glimpse of the technical program for next year's show. Please watch for next month's issue for a more detailed preview of the technical program.

Sponsored Recommendations

UHF to mmWave Cavity Filter Solutions

April 12, 2024
Cavity filters achieve much higher Q, steeper rejection skirts, and higher power handling than other filter technologies, such as ceramic resonator filters, and are utilized where...

Wideband MMIC Variable Gain Amplifier

April 12, 2024
The PVGA-273+ low noise, variable gain MMIC amplifier features an NF of 2.6 dB, 13.9 dB gain, +15 dBm P1dB, and +29 dBm OIP3. This VGA affords a gain control range of 30 dB with...

Fast-Switching GaAs Switches Are a High-Performance, Low-Cost Alternative to SOI

April 12, 2024
While many MMIC switch designs have gravitated toward Silicon-on-Insulator (SOI) technology due to its ability to achieve fast switching, high power handling and wide bandwidths...

Request a free Micro 3D Printed sample part

April 11, 2024
The best way to understand the part quality we can achieve is by seeing it first-hand. Request a free 3D printed high-precision sample part.