Frequency synthesis has long represented a means of generating high-frequency signals that remain stable over time and temperature. At RF and microwave frequencies, many different synthesis techniques exist, based on analog and digital components and presenting many different tradeoffs in terms of size, cost, and performance, but the many different requirements for stable RF/microwave signals have justified the use of many different frequency synthesis methods, using both analog and digital approaches. Frequency synthesizers can range in size from tiny integrated circuits (ICs) to full rack-mountable electronic systems with modulation and other functions. As this first of a two-part article on frequency-synthesizer fundamentals will show, frequency synthesizers may vary widely in their frequency ranges and step sizes, but they share goals of attempting to generate precise, noise-free output signals as repeatedly as possible, even when operating under harsh conditions.
Microwave frequency synthesizers generally attempt to stabilize the phase of a high-frequency oscillator, such as a dielectric resonator oscillator (DRO), voltage-controlled oscillator (VCO), or yttrium-iron-garnet (YIG) oscillator, by locking it within one or two tuning loops to the phase of a lower-frequency reference oscillator, such as a temperature-compensated crystal oscillator (TCXO) or an oven-controlled crystal oscillator (OCXO). Phase noise is often a performance parameter of comparison for many frequency synthesizers, with many designs attempting to approach the stability of the thermal noise floor of -174 dBc/Hz at room temperature.
These analog frequency synthesizers employ some multiple of the reference frequency oscillator to compare the phase of the reference to that of the higher-frequency microwave oscillator. When an integer multiple of the reference oscillator’s frequency is used for phase comparison, it is known as an integer-N phase lock loop (PLL) frequency synthesizer. When a fractional multiple of the reference oscillator’s frequency is used, it is referred to as a fractional-N PLL frequency synthesizer. Single or dual loops can be used for phase comparison, with multiple loops providing greater overall phase stability but requiring longer settling times or frequency switching speeds.
Frequency synthesizers generate many of the signals used for transmission and reception in RF/microwave systems. Synthesizers can take on many forms and power requirements, as determined by the needs of a system, and can range in size from multiple-function integrated circuits (ICs) to instrument-sized rack-mount assemblies, complete with power-supply circuitry. As this first of a two-part article on frequency synthesizer fundamentals will show, frequency synthesizers may vary widely in their frequency ranges and step sizes, but they share goals of attempting to generate precise, noise-free output signals as repeatedly as possible, even when operating under harsh conditions.
In one of the most popular realizations of analog frequency synthesizers, a PLL uses the low-noise characteristics of a reference oscillator to stabilize the phase of a higher-frequency tunable oscillator, such as a current-tuned YIG oscillator or a voltage-controlled oscillator (VCO). Phase-locked oscillators can also be produced for wide tuning ranges as well as for single, fixed frequencies, housed in miniature surface-mount-technology (SMT) packages measuring a fraction of an inch square with low power consumption for portable and battery-powered applications (Fig. 1). They can also be as elaborate as rack-mountable instruments, complete with full modulation and programming capabilities. In addition to the use of PLL ICs and discrete components to implement analog frequency synthesizers, RF/microwave frequency synthesizers can be implemented with digital circuit approaches, taking advantage of high-speed digital components such as digital-to-analog-converters (DACs) to produce high-frequency signals with high resolution and low noise levels.
A PLL’s phase detector is a critical component in the PLL circuitry, using feedback to synchronize the output frequency of the tunable oscillator to the input frequency of the reference oscillator, in effect locking the output phase of the higher-frequency oscillator to the input phase of the reference oscillator, which is usually a source that has been designed for high stability, such as an OCXO or a TCXO. By using a PLL feedback loop, the phase noise of the higher-frequency oscillator essentially becomes that of the lower-frequency reference oscillator.
The use of IC technology in realizing different portions of analog and digital PLL frequency synthesizers has helped to boost the performance and repeatability of these frequency sources while keeping sizes small. A recent advance by Synergy Microwave Corp. in the development of an application-specific IC (ASIC) to enhance the performance of a line of PLL-based frequency synthesizers from 100 MHz to 15 GHz provides generous functionality and control that fits within 2.25 × 2.25 in. modules or 1.00 × 1.25 in. surface-mount-technology (SMT) packages because of the high circuit density of the ASIC (Fig. 2).
In larger, instrument-grade housings (Fig. 3), frequency synthesizers are combined with modulation capabilities to serve as test signal sources. All power supplies and required functionality are included in the instrument enclosure. Not all newer synthesized test sources require 19-in.-wide rack-mount enclosures, with compact frequency synthesizers such as the QuickSyn microwave synthesizers from National Instruments fitting within PXI instrument modules and combining a number of different frequency synthesis technologies to pack generous performance into small enclosures. The synthesizers can be provided across frequency ranges as wide as 0.5 to 10 GHz and 0.5 to 20 GHz, achieving low noise and fast switching speed at the same time. The VCO-based frequency synthesizers conserve power while achieving relatively fast switching speeds with low noise levels, leveraging DDS techniques for fast switching speeds even with frequency steps as small as 0.001 Hz.
Setting Target Levels
In addition to a target phase-noise level at a particular offset frequency from the carrier, an analog PLL frequency synthesizer can be designed with a number of different performance targets, including power consumption, switching speed, spurious and harmonic noise, and output power. The frequency tuning range of the frequency synthesizer will be dictated by the choice of tunable oscillator for the synthesizer, such as a dielectric-resonator oscillator (DRO), VCO, or YIG-tuned oscillator.
Due to needs for higher levels of integration in many systems, PLL frequency synthesizers are increasingly implemented by means of digital circuits, such as integer-N or fractional-N PLL frequency synthesizers. In an integer-N PLL synthesizer, for example, the output of the VCO or other tunable oscillator is controlled by integer factor of multiplication of the reference oscillator to achieve the required output frequency. A digital counter structure is used to divide the frequency of a VCO, YIG, DRO, or other tunable high-frequency oscillator for comparison with the phase of the reference oscillator. By using fractional-N multiplication factors when comparing the phases of the two oscillators in a PLL frequency synthesizer, frequency tuning can be performed with high resolution, in extremely fine tuning steps.
Requirements vary a great deal in terms of bandwidths and tuning ranges, but the goal of most RF/microwave frequency synthesizers is to provide stable, low-noise signals within the frequency band of interest required for tuning a system. Analog frequency synthesizers often use the principles of PLLs to compare the phase of a high-frequency oscillator, such as a VCO or DRO, to that of a lower-frequency reference oscillator such as a TCXO or an OCXO, so that higher-frequency oscillator will take on the frequency stability of the lower-frequency reference oscillator.
Whether using an analog or digital architecture, an RF/microwave frequency synthesizer will achieve some performance levels at the cost of others, such as tuning frequency resolution versus frequency tuning speed. As noted earlier, single-sideband (SSB) phase noise is often a driving performance parameter for many systems since such noise can limit the receive sensitivity and dynamic range of the system. But, depending upon a system’s application, other performance parameters may be required.
For example, for a receiver that must be capable of tuning across a wide portion of frequency bandwidth with high speed, such as to detect signal activity in a given bandwidth, frequency tuning speed may be of greater importance ultimately than phase noise, and it may be desirable to fashion a frequency synthesizer with relatively large frequency tuning steps for the sake of achieving high-speed frequency tuning speeds. For portable radio applications, a combination of low phase noise, low spurious noise, and high power efficiency may help a radio to provide the best receive sensitivity for the longest time while operating on rechargeable batteries. The physical size of a frequency synthesizer, especially for a portable system design, is also an important consideration, as well as how well it handles motion and vibration. No one frequency synthesizer type provides an ideal solution for all applications with many tradeoffs to consider depending upon the requirements of an application.
Next month, the second part of this “Engineering Essentials” article on frequency synthesizers will focus on DDS sources and how they differ from analog PLL-based frequency synthesizers, and when and why it might make sense to specify a DDS rather than an analog PLL-based frequency synthesizer for a particular application.