Pixus Technologies
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Backplane Races Past 100 GbE and 28 GBd/s

Nov. 29, 2022
This high-speed backplane is formed with high-quality circuit materials and specialized interconnections to achieve speeds more than 28 gigabaud/s across more than a dozen slots.

Well known for its high-speed embedded-computing solutions, Pixus Technologies recently raced past 100 Gigabit Ethernet (GbE) with a high-performance backplane that features high-quality materials as well as specialized connectors to support the exceptional data rates.

In addition to low-loss circuit materials and optical, RF, and VITA 66/67 high-speed interfaces, the design draws on a 6U SOSA-aligned, OpenVPX form factor to encourage integration as an embedded computing solution. Based on an open-standard commercial-off-the-shelf (COTS) computing architecture, the backplane design (see image above) has demonstrated symbol rates of more than 28 gigabaud/s (GBd/s) across its backplane slots.

Equipped with 13 backplane slots, the design connects the slots by means of RF and optical interfaces to one of the company’s RiCool chassis units for testing and analysis. When evaluating designs at speeds of more than 16 GBd/s (PCIe Gen4), the firm typically studies the preservation of the transferred data’s signal integrity (SI) across different signal paths at such high symbol rates.

For example, by performing “before-and-after” analysis of eye diagrams even at rates beyond 28 GBd/s, all backplane slots have shown excellent SI results with wide eye-diagram openings. As a mechanical interface, the specialized RF connector must ensure a precise impedance match between the two sides of the signal path.