Artur Szczybylo |
Engineering Plan E Dpromo

The Importance of Setting Stretch Engineering Goals

June 4, 2021
Design engineers need to look five years or more into the future and be bold when creating stretch goals. This isn’t for the timid as the undertaking requires a deep understanding of technology, future trends, and being willing to take a calculated risk.

This article appeared in Electronic Design and has been published here with permission.

What you’ll learn:

  • The importance of setting stretch goals for an engineering team.
  • How to build support throughout the company for the resulting moonshot projects.
  • Creating energy-efficient computer processors.


At AMD, we design state-of-the-art high-performance processors to service the world’s compute infrastructure. Staying on the cutting edge of technology requires bold engineering, but it also requires bold thinking—to cast a vision five years or more into the future by creating stretch goals.

Though the idea of setting a stretch goal can apply personally, it also goes for entire organizations. It’s not something for the timid, as the undertaking requires a deep understanding of the technology, future trends, and perhaps most importantly being willing to take a calculated risk. The risk doesn’t always pay off, but when it does, the results are very gratifying.

Every new project has an element of uncertainty. Besides the technical risk of falling short of the goal, a product could fail to meet the needs of a dynamic market, even if successful from an engineering perspective. This is something I know first-hand from earlier experience as part of the Itanium processor engineering team. One thing is certainplaying it safe ensures a lack of breakthroughs and ultimately leads to irrelevance.

Go Bold

As a leader within a major engineering organization, I push my team to reach for bold goals. Embracing the future means setting stretch goals—goals that go beyond what we know we can comfortably do, to what we believe we can possibly do with hard work and creative thinking. Stretch goals keep a company at the top of its game.

That mindset led, in 2014, to the creation of a goal to improve the typical-use energy efficiency of our mobile processors—those used in notebook computers—by a factor of 25 by 2020, aptly named the AMD 25x20 Energy Efficiency Initiative. In the previous six years, we had achieved a 10x improvement. This tracked the semiconductor industry average improvement over that period, so it was considered a good achievement. But I felt that with even greater innovation and focus across the company, we could do even better on energy efficiency.

Energy efficiency is a ratio of performance and the typical-use power of processors. In addition to the benefits of increased performance, efficiency gains help extend battery life, enable development of smaller and less material-intensive devices, and limit the overall environmental impact of the ever-increasing numbers of computing devices.

Energy-Efficiency Roadmap

More than wishful thinking, we spent a good deal of time penciling out what would be needed and the probability of success. While initially it looked daunting and improbable to the engineering team, I collected their input, adapted the goal accordingly, and worked toward a formulation to gain their buy-in based on technical evidence. We also rallied around how improved energy efficiency would benefit the planet and the company by providing highly desirable, energy-efficient products.

That said, there was a certain amount of evangelization required around the value of the goal and the means to achieve it. Essentially, it was a process of building support by finding fellow champions who wanted to join and help lead. This same approach enlisted the support of senior leaders at AMD, a requisite for any large engineering project. As more people learned of the goal, we saw more colleagues who wanted to participate and contribute.

At the start, we had reasonable visibility through our roadmap of what we could achieve at the outset but six years in the semiconductor industry is a very long time. Our “Carizzo” processor was already designed and would make substantial improvements leading toward the goal. Beyond that, we made informed calculations about what we and our partners could possibly do over the full-time horizon.

Once announced publicly in 2014, some external observers expressed skepticism the 25x goal could be achieved, likely based on industry advances up to that point and the already-looming slowdown in Moore’s Law. We certainly did not think the goal was unobtainable but also knew that it required the best execution possible to succeed, with little room for error.

A “Zen” Mindset

25x20 was not the only stretch engineering goal of note during this timeframe. The company was also transitioning the microarchitecture of our CPU cores to what would come to be known as “Zen.” During this process, our team set a stretch goal to achieve +40% for instructions per cycle (IPC) for improving our CPU performance. Zen IPC and 25x20 were synergistic, with the accomplishments of one helping to drive forward and fulfill the needs of the other.

Similar to 25x20, there was skepticism internally and externally of the CPU design team that the aggressive goal could be achieved, but specifics were established. As the team met milestones along the way, the confidence increased, with the end result exceeding the goal at +52% IPC at introduction.1 

There were times over the six-year 25x20 initiative when success wasn’t certain. The known technology in 2014 would not support the goal. The same was true as late as 2016. By 2018, with our 2020 product under design, we could see the path to success, but we still had to prove it. There were several times when the outlook was clouded, and 2018 was such a moment.

Reflecting on Renoir

I will not call it a moment of alarm, but there was a period of reflection and recalibration as the 25x achievement of our 2020 “Renoir” product was uncertain. Great engineering is typically the result of the stress and pressure of necessity driving innovation.

In this case, we took on the challenge of implementing Modern Standby, a feature of the Windows 10 operating system. This complemented capabilities we had created in hardware and firmware to enter an energy-efficient low-power state when the processor is idle, but what we developed didn’t deliver the expected power savings initially. The path forward required close partnership with Microsoft to bring the feature to fruition.  

Had we not been successful with this feature, we would have had to find another path to be successful. Defining numerous alternative paths are a good strategy to keep in mind when reaching for stretch goals. For nearly every innovation created to achieve 25x20, and there were several others along the way, alternatives also existed that involved different methodologies or technologies. There was always a Plan B for every critical step.

Taking on any stretch engineering goal has intrinsic risks, perhaps more so with 25x20 as we pushed the boundaries. Added to that we reported publicly on our progress every year, and that upped the visibility of the work and thus the stakes.


1. Generational IPC uplift for the “Zen” architecture vs. “Piledriver” architecture is +52% as measured with SPECint06 compiled with GCC 4.6 –O2 at a fixed 3.4 GHz. Generational IPC uplift for the “Zen” architecture vs. “Excavator” architecture is +64% as measured with Cinebench R15 1t and SPECint06 compiled with GCC 4.6 –O2 at a fixed 3.4 GHz. System configs: AMD reference motherboard(s), AMD Radeon R9 290X GPU, 8-GB DDR4-2667 (“Zen”)/8-GB DDR3-2133 (“Excavator”)/8-GB DDR3-1866 (“Piledriver”), Ubuntu Linux 16.x (SPECint06) and Windows 10 x64 RS1 (Cinebench R15). SPECint06 scores: “Zen” vs. “Piledriver” (31.5 vs. 20.7 | +52%), “Zen” vs. “Excavator” (31.5 vs. 19.2 | +64%). Cinebench R15 1t scores: “Zen” vs. “Piledriver” (139 vs. 79 | +76%), “Zen” vs. “Excavator” (139 vs. 88 | +58%).

Sponsored Recommendations

Getting Started with Python for VNA Automation

April 19, 2024
The video goes through the steps for starting to use Python and SCPI commands to automate Copper Mountain Technologies VNAs. The process of downloading and installing Python IDC...

Can I Use the VNA Software Without an Instrument?

April 19, 2024
Our VNA software application offers a demo mode feature, which does not require a physical VNA to use. Demo mode is easy to access and allows you to simulate the use of various...

Introduction to Copper Mountain Technologies' Multiport VNA

April 19, 2024
Modern RF applications are constantly evolving and demand increasingly sophisticated test instrumentation, perfect for a multiport VNA.

Automating Vector Network Analyzer Measurements

April 19, 2024
Copper Mountain Technology VNAs can be automated by using either of two interfaces: a COM (also known as ActiveX) interface, or a TCP (Transmission Control Protocol) socket interface...