3U VPX Dual RF Transceiver Delivers 70-MHz to 6-GHz TDD, FDD

Jan. 2, 2020

The VPX571 also handles channel bandwidths from 200 kHz to 56 MHz.

VadaTech’s VPX571 dual RF agile transceiver is based around the AD9364 from Analog Devices and Xilinx’s UltraScale+ ZCXU15EG MPSoC. As a result, the module supports time division duplexing (TDD) and frequency division duplexing (FDD) from 70 MHz to 6 GHz and channel bandwidths from 200 kHz to 56 MHz. The module includes a 64-bit-wide DDR4 memory channel for supporting large datasets. The Xilinx FPGA features 3528 DSP slices and 746k logic cells. It also houses a quad-core Arm application processor, dual-core Arm real-time processor, Mali graphics processor unit, as well as block RAM and UltraRAM. Onboard memory includes 64 GB of flash, 128 MB of boot flash, and a slot for an SD card connection. For interfacing, the module has options for SERDES, dual GbE, and eight LVDS connections.

VadaTech, 198 N. Gibson Rd., Henderson, NV 89014; (702) 896-3337

About the Author

Cabe Atwell

Engineer, Machinist, Maker, Writer. A graduate Electrical Engineer actively plying his expertise in the industry and at his company, Gunhead. When not designing/building, he creates a steady torrent of projects and content in the media world. Many of his projects and articles are online at element14 & SolidSmack, industry-focused work at EETimes & EDN, and offbeat articles at Make Magazine. Currently, you can find him hosting webinars and contributing to Penton’s Electronic Design and Machine Design.