SiGe Direct Modulators Ease Upconverter Design

Oct. 1, 2003
These direct quadrature modulators support digital modulation formats with I and Q bandwidths as wide as 250 MHz for carrier frequencies from 250 to 7000 MHz.

Direct quadrature modulators provide many benefits to transceiver/transmitter designers working with modern digital-modulation formats. Compared to superheterodyne upconversion approaches, direct quadrature modulation enables simpler, smaller designs at lower costs. With advances in RF integrated circuit (RF IC) and silicon-germanium (SiGe) process technologies, the engineers at Hittite Microwave have succeeded in bringing direct quadrature modulator components to a new level, extending direct modulation to 7 GHz. The company's models HMC495LP3 and HMC496LP3 SiGe direct quadrature modulators work from 250 to 3800 MHz and from 4.0 to 7.0 GHz, respectively, housed in compact 3 × 3-mm leadless surface-mount packages. With these modulators, designers can simplify a transmit-signal chain by eliminating one mixer stage, along with its associated matching, filtering, voltage-controlled oscillator (VCO), phase-locked loop (PLL), and LO buffering circuitry.

The HMC495LP3 and HMC496LP3 wideband SiGe direct quadrature modulators (Fig. 1) are based on high-frequency SiGe heterojunction-bipolar-transistor (HBT) technology. The silicon semiconductor process supports high-level integration at extremely high transition frequencies and with relatively low power consumption. The lower-frequency HMC495LP3 is suitable for Global System for Mobile Communications (GSM), code-division multiple access (CDMA), wideband CDMA (WCDMA), personal handyphone system (PHS), fixed-wireless, MMDS, and wireless-local-loop (WLL) systems. The higher-frequency HMC496LP3 serves IEEE 802.11a wireless-local-area-network (WLAN), UNII, and microwave radio applications.

The HMC495LP3 employs a polyphase network which separates the local oscillator (LO) into two equal amplitude signals, with 90-deg. phase difference between them (Fig. 2). The signal-splitting and limiting-amplification circuitry comprising the polyphase network is designed for optimum performance over a wide range of LO input power levels. LO signal paths are closely matched on chip to minimize phase offsets; the differential-mode transmission lines provide excellent immunity to noise. Each divided LO signal drives an active Gilbert-cell mixer, upconverting the IP/IN in-phase and QP/QN quadrature baseband data inputs, respectively. The upconverted IP/IN and QP/QN signals are then recombined in-phase, and converted from a balanced transmission line to a single-ended RF output.

The dynamic range of a direct quadrature modulator is critical in maintaining the integrity of digitally modulated signals. The dynamic range of a direct modulator can be defined as the ratio of its output power at 1-dB compression (in dBm) to its output noise floor (in dBm/Hz). The HMC495LP3 achieves output power at 1-dB compression of typically +2 dBm at 450 MHz and −2 dBm at 3800 MHz. The device's output noise floor is typically −157 dBm/Hz at 450 MHz and at 3800 MHz (Fig. 3), with the output noise floor measured at an offset of 20 MHz from the carrier, with supply voltage (Vcc) of +3.3 VDC and baseband bias voltage (VDC) of +1.15 VDC. These values translate into a dynamic range of 155 to 159 dB across the 450-to-3800-MHz band.

Another important aspect of a direct quadrature modulator's performance is its sideband and carrier suppression, as well as its ability to control third-harmonic output levels. The HMC495LP3 direct quadrature modulator typically attains sideband and carrier suppression of −30 and −35 dBc, respectively, with output third-harmonic distortion of −50 dBc across the full band (see table). These suppression levels were measured for typical output power of −6 dBm, Vcc of +3.3 VDC, baseband frequency of 200 kHz at 800 mV peak-to-peak differential, and baseband bias voltage of +1.15 VDC. In specific bands, the performance is often considerably better, with third-harmonic suppression of −59 dBc from 450 to 960 MHz and −56 dBc from 3400 to 3800 MHz (Fig. 4).

The high dynamic range of the HMC495LP3 is evident in its outstanding adjacent-channel-power-ratio (ACPR) performance under WCDMA conditions (Fig. 5). When driven to −14 dBm of WCDMA channel power at 2140 MHz, the HMC495LP3 provides ACPR performance of better than −59 dBc in both upper and lower adjacent channels. This performance is as good or better than other, more narrowband direct modulator RF ICs. Note that the WCDMA ACPR was measured at an offset of 3.84 MHz using a spectrum analyzer with 30-kHz resolution-bandwidth filters, Vcc of +3.3 VDC, and baseband bias voltage of +1.15 VDC.

The versatile HMC495LP3 direct quadrature modulator accepts a wide range of LO input power levels from −6 to +6 dBm, and delivers an extremely wide I and Q modulation bandwidth of DC to 250 MHz (in support of virtually all existing and many emerging modulation formats) when using the recommended 10-pF shunt capacitors. The HMC495LP3 will provide stable operation over a supply voltage range of +3.0 to +3.6 VDC, and a temperature range of −40 to +85°C.

The LO port of the HMC495LP3 can be driven in either single-ended or differential mode. Driving the LO port in single-ended mode will eliminate the need for an external balun, the cost of which will depend on the frequency and bandwidth of operation. Driving the LO port in differential mode will improve the carrier suppression level by about 3 dB at 3500 MHz, although the relative improvement will be less at lower frequencies. Modulator carrier suppression can be improved by adjusting the DC offset in the I and Q input ports. The ideal DC offset of the I and Q signals depends on the final circuit layout, so the DC offset should be adjusted accordingly to correct for any slight asymmetries in the final circuit layout.

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Similarly, the HMC495LP's sideband suppression can be optimized by adjusting the gain and phase offset between the I and Q input ports. As with the carrier-suppression DC offset adjustment, the ideal gain and phase offset between the I and Q signals depends on the actual application circuit.

The HMC495LP3 can be used to create virtually any analog- or digital-modulation format including binary phase-shift keying (BPSK), quadrature phase-shift keying (QPSK), eight-state phase-shift keying (8PSK), orthogonal frequency-division multiplex (OFDM), and quadrature amplitude modulation (QAM). The direct quadrature modulator's wide bandwidth and low noise floor make it a suitable choice for base-station, access point, and customer-premises-equipment (CPE) applications in the cellular, personal-communications-services (PCS), UMTS, fixed wireless, and HiperLAN/HiperMAN WLAN bands. This wideband capability allows the transceiver designer to use a common printed-circuit-board (PCB) design for multiple frequency bands. The HMC495LP3 is also well suited for applications in software-defined radios (SDRs) where the upconverter must dynamically vary its modulation format depending on changing conditions and requirements (Fig. 6).

For the measurements shown in this article, data were taken with a single-ended LO source applied to the HMC495LP's LOP port, with the LON port terminated to ground through a 50-Ω resistor (Fig. 7). A shunt 68-Ω resistor is used on each of the LON and LOP ports to improve LO port return loss, while a 100-pF series capacitor prevents DC voltage from appearing on the application PCB.

The HMC495LP3 has two supply and two bias input lines. To reduce any power-supply noise, each of these lines is decoupled by shunt 4.7-µF capacitors placed close to the input connector, and shunt 1000-pF capacitors placed in close proximity to the 3 × 3-mm package. The nominal supply voltage for Vcc1 and Vcc2 is +3.3 VDC. Voltage Vbb1 is tied to Vcc, while the Vbb2 voltage is dropped to +3.0 VDC through a series 62-Ω resistor; this reduction in Vbb2 will improve the sideband suppression and output noise, while reducing the overall power consumption. The RF output of the HMC495LP3 is single ended and a series 100-pF capacitor is used for DC blocking.

The IP/IN and QP/QN ports of the HMC495LP3 are DC coupled to allow modulation frequencies down to DC. All four ports are shunted to ground with a 10-pF capacitor. This capacitance value was chosen for a low impedance to ground at the LO frequency, in order to improve the carrier suppression and to filter noise. The HMC495LP's modulation bandwidth can be increased beyond 250 MHz by removing these capacitors or reducing their values.

In addition to the HMC495LP3, the company has also announced the HMC496LP3 4.0-to-7.0-GHz SiGe direct modulator for higher-frequency applications. It offers typically −39 dBc sideband suppression and −35 dBc carrier suppression, with third-harmonic intermodulation levels of typically −44 dBc (Fig. 8). These suppression levels were measured with typical output power of +3 dBm, Vcc of +3.0 VDC, baseband frequency of 200 kHz at 1.2 V peak-to-peak differential voltage and Vdc of +1.3 VDC.

The HMC496LP3 achieves output power at 1-dB compression of typically +3 dBm at 4.0 GHz and +4 dBm at 6.0 GHz. The output noise floor is typically −157 dBm in a 1-Hz bandwidth from 4.0 to 6.0 GHz (Fig. 9), when measured at an offset of 20 MHz, with Vcc of +3.0 VDC and Vdc of +1.3 VDC. These values translate into a dynamic range of approximately 160 dB from 4.0 to 6.0 GHz.

Both the HMC495LP3 and the HMC496LP3 wideband SiGe direct quadrature modulators are available from stock. Complete specifications can be found on the company's website. The company also offers evaluation boards fabricated on high-performance 4350 PCB material from Rogers Corp. (Rogers, CT) with SMA connectors for ease of testing. Hittite Microwave Corp., 12 Elizabeth Dr., Chelmsford, MA 01824; (978) 250-3343, FAX: (978) 250-3373, Internet:

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