Book Report: CMOS RFIC Design Principles by Robert Caverly

Oct. 15, 2008
At one time, high-frequency engineers might have associated silicon CMOS processes with digital circuits or, at most, low-frequency RF devices. But with nanoscale fabrication processes improving, a variety of semiconductor companies and ...

At one time, high-frequency engineers might have associated silicon CMOS processes with digital circuits or, at most, low-frequency RF devices. But with nanoscale fabrication processes improving, a variety of semiconductor companies and silicon foundries are pushing CMOS processes well into the millimeter-wave frequency range, to 60 GHz and beyond, in the hopes of finally commercializing millimeter-wave devices. To take advantage of this surging interest in CMOS radio-frequency integrated circuits (RFICs), Robert Caverly, a professor at Villanova University, has assembled an excellent introduction to designing basic RF circuits in silicon CMOS. The 435-page text, CMOS RFIC Design Principles, is accompanied by a CD-ROM with a variety of demonstration versions of computer-aided-engineering (CAE) programs and circuit layouts to help readers become fully immersed in CMOS RFIC design.

The text opens with a review of system- level parameters in Chapter 1, discussing key performance targets such as gain, noise figure, and minimum detectable signal. This high-level view of electronic systems allows a smooth transition to the importance of certain components, such as the amplifier, in a system that relies on interaction between a receiver and a transmitter. This first chapter provides some basic math for determining amplifier gain and noise figure, as well as brief coverage of the system nonlinearities that can affect amplifier performance and system link budget.

The second chapter jumps into CMOS IC fundamentals, including process building blocks, such as n-channel and p-channel MOSFETs along with basic and more advanced equivalent circuits for the two types of devices. This chapter also reviews scattering parameters (S-parameters) for these and other active devices and how these parameters can be used with CAE programs, such as SPICE-based software, to predict the behavior of the active devices in a circuit.

The text includes five appendices devoted to sample SPICE-3 parameters for n-channel and p-channel MOSFETs, sample SPICE BSIM parameters for the two basic CMOS MOSFETs, Y-parameters for a basic CMOS MOSFET model, parameter conversion equations for two-port networks, and some basic constants and properties of silicon and CMOSrelated materials. Artech House, 685 Canton St., Norwood, MA 02062 (781) 769-9750, Fax: (781) 769-6334, Internet: www.artechhouse.com.

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