Software And Modeling Unite To Raise Yield

May 9, 2013
By combining passive component models with EDA software, this solution promises to improve design flow efficiency while paving the way for first pass design success.

Electronic-design-automation (EDA) software includes optimizers, which often help RF/microwave designers meet new criteria. For a microwave filter, for example, the optimization case could include goals for in-band insertion loss and return loss, cutoff frequency, and out-of-band rejection. Unfortunately, however, the optimization engine must consider a large number of criteria to create what are often size-limited and rather random solutions. In a four-page application note titled “Improved Circuit Design Flow Using Modelithics Passive Models,” AWR Corp. presents a method to raise design efficiency while keeping an eye toward cost-effective, first-pass design success.

Accurate passive-component models are key to this solution, as they will enable yield analysis via a tolerance setting. The solution combines Modelithics' Global Models or passive resistive-inductive-capacitive (RLC) components with AWR’s Microwave Office software. In doing so, it is able to map individual components’ impact on subsystem performance. A tradeoff can then be made regarding component values and tolerance (with low tolerance being more expensive and high tolerance less so).

A standard low-pass-filter (LPF) design is employed to demonstrate the new approach. After the synthesis of an ideal filter, the ideal components are replaced with Global Models. Transmission-line effects are added eventually as well. To compensate for non-idealities and parasitic effects, an optimization of component values is then performed. The resulting nominal filter design should match the design goals well, although the design can be further optimized.

This flow can be improved by adding tolerance and yield analysis before fabrication. To run statistics with Modelithics Global Models, a tolerance parameter is enabled. It is then assigned to the anticipated manufacturing distribution and yield analysis is performed. As a byproduct of yield analysis, the Microwave Office simulation can be set up to output sensitivity graphs for all of the various parameters. Using those graphs, the user can quickly tell the parameters to which the design performance is or is not sensitive. This information also reveals what parameters can be changed for improved yield. Starting with an ideal design, the note shows that it is possible to achieve a nominal design with good agreement to measurements. That design can then be adjusted for improved yield while accounting for anticipated manufacturing tolerances.

AWR Corp., 1960 E. Grand Ave., Suite 430, El Segundo, CA 90245; (310) 726-3000, www.awrcorp.com.

About the Author

Nancy Friedrich | Editor-in-Chief

Nancy Friedrich began her career in technical publishing in 1998. After a stint with sister publication Electronic Design as Chief Copy Editor, Nancy worked as Managing Editor of Embedded Systems Development. She then became a Technology Editor at Wireless Systems Design, an offshoot of Microwaves & RF. Nancy has called the microwave space “home” since 2005.

Sponsored Recommendations

Wideband MMIC LNA with Bypass

June 6, 2024
Mini-Circuits’ TSY-83LN+ wideband, MMIC LNA incorporates a bypass mode feature to extend system dynamic range. This model operates from 0.4 to 8 GHz and achieves an industry leading...

Expanded Thin-Film Filter Selection

June 6, 2024
Mini-Circuits has expanded our line of thin-film filter topologies to address a wider variety of applications and requirements. Low pass and band pass architectures are available...

Mini-Circuits CEO Jin Bains Presents: The RF Engine of the 21st Century

June 6, 2024
In case you missed Jin Bains' inspiring keynote talk at the inaugural IEEE MTT-S World Microwave Congress last week, be sure to check out the session recording, now available ...

Selecting VCOs for Clock Timing Circuits A System Perspective

May 9, 2024
Clock Timing, Phase Noise and Bit Error Rate (BER) Timing is critical in digital systems, especially in electronic systems that feature high-speed data converters and high-resolution...