Compact DDS Silences Spurious And Phase Noise

April 1, 2003
Proprietary circuitry helps this modular DDS to achieve impressive phase-noise and spurious levels from 20 MHz to 3 GHz.

Direct-digital synthesis (DDS) has been an appealing commercial and military source technology for over a decade. One limitation, however, has been traditionally poor spurious performance, as a function of the bit resolution of the DDS and its digital-to-analog-converter (DAC) circuitry. Fortunately, Advanced Radio Corp. (Reston, VA) has developed proprietary circuitry to effectively reduce DDS spurious levels to a bare minimum, embodied in the company's ADV-3000S synthesizer module. The DDS source achieves spurious levels of typically better than −90 dBc from 20 MHz to 3 GHz; the basic architecture can be extended to 18 GHz.

The ADV-3000S (Fig. 1) is ideal as a programmable local oscillator (LO) for radar, signal-intelligence (SIGINT), and electronic-warfare (EW) receiver (Rx) applications. The digital circuits used to implement signal-processing functions do not suffer the effects of thermal drift, aging, and component variations associated with their analog counterparts. Commercial applications include base stations, high-data-rate communications links, and test equipment including signal generators and spectrum analyzers. Through programming, the DDS adaptive-channel bandwidths, modulation formats, frequency hopping, and data rates are easily changed. When used as a quadrature synthesizer, the DDS technology affords unparalleled matching and control of in-phase (I) and quadrature (Q) outputs. In its simplest form, a direct digital synthesizer can be implemented from a precision reference clock controlling a numerically controlled oscillator (NCO), a sine look-up table, programmable read-only memory (PROM), and a DAC.

The ADV-3000S synthesizer operates from 20 MHz to 3.0 GHz with standard tuning resolution of 1 Hz, although its flexible architecture supports a variety of step sizes. It tunes to a new frequency in less than 5 µs, and delivers typical output-power levels of +10 dBm. The measured phase noise is better than −108 dBc/Hz offset 10 Hz from a 104.85-MHz carrier and −142.6 dBc/Hz offset 100 kHz from the same carrier. Verifying such low phase noise required using the 20logN noise multiplication relationship to derive phase-noise levels at lower-frequency carriers from measured results at higher frequencies. The table shows the results of the multiplication process. For example, the measured phase noise offset 100 kHz from a 2201.85-MHz carrier is −112.2 dBc/Hz. The 20logN noise degradation of noise as the result of a 21-times multiplication of a 104.85-MHz carrier (to produce 2201.85 MHz) is 26.4 dB. So, to derive the interpolated unmultiplied carrier phase noise floor at 104.85 MHz, this 26.4 dB is subtracted from the measured noise floor of −112.2 dBc/Hz to yield a noise floor of −142.6 dBc/Hz offset 100 kHz from a 104.85-MHz carrier.

The ADV-3000S DDS offers fast frequency agility as well as control of phase hops/modulation and phase-continuous frequency hops with none of the overshoot or undershoot associated with analog phase-locked loops (PLLs). In fact, the synthesizer support a wide range of modulation formats, including quadrature phase-shift keying, (QPSK), quadrature amplitude modulation (QAM), binary phase-shift keying (BPSK), frequency modulation (FM), amplitude modulation (AM), and linear and nonlinear FM chirp. The system also accommodates frequency-shift-keying (FSK) and binary-phase-shift-keying (BPSK) modulation inputs.

The ADV-3000S features impressive spurious reduction compared to conventional DDS sources. For example, the typical spurious output levels of a 2.4-GHz DDS over a 10-MHz frequency span is −60 dBc (Fig. 2). Using proprietary spurious-canceling circuitry to achieve a better-than 30-dB reduction in output spurious levels compared to conventional DDS sources (Fig. 3).

The ADV-3000S is supplied in a single-slot 6U VME housing measuring 6.5 × 10.3 × 0.8 in. (16.51 × 26.162 × 2.032 cm). It is designed for operating temperatures from 0 to +50°C and consumes less than 17 W of power during normal operation. The standard digital-interface control is through the VME-bus digital interface with optional RS-232 and Ethernet formats. The company has also integrated the ADV-3000S DDS source with the model ADV-3000T very-high-frequency (VHF)/ultra-high-frequency (UHF) downconverter to form a fast-tuning radio solution that operates from 20 MHz to 3 GHz (and can be extended to 18 GHz) with typical noise figure of 10 dB. The input third-order input intercept point is typically +8 dBm, and the output second- and third-order intercept points are +75 and +35 dBm, respectively. The assembly offers standard intermediate frequencies (IFs) of 70 and 140 MHz, with selectable bandwidths of 0.5, 1, 2, 5, 20, and 40 MHz at 70 MHz increasing to 65 MHz at 140 MHz. As with the DDS, the tuning resolution of the downconverter/Rx is 1 Hz with typical phase noise levels of −110 dBc/Hz offset 1 kHz from the carrier, −115 dBc/Hz offset 10 kHz from the carrier, and −125 dBc/Hz offset 100 kHz from the carrier. The typical LO re-radiation levels of −90 dBm. The RF unit is also supplied in a single-slot 6U VME housing. Advanced Radio Corp., 1763 Fountain Dr., Ste. 101, Reston, VA, 20191; (703) 435-5900, FAX: (703) 435-1110, e-mail: [email protected], Internet:

About the Author

Paul Jackson | President, Precision Receivers

Paul Jackson helped launch Freestate Electronics, a successful FAA supplier, and co-founded Advanced Radio Corporation, a receiver design company that was later acquired by Mercury Systems. He also created a technique for canceling spurs in a DAC or DDS that resulted in one of the industry’s fastest-tuning, lowest phase-noise synthesizers.

Sponsored Recommendations

Wideband MMIC LNA with Bypass

June 6, 2024
Mini-Circuits’ TSY-83LN+ wideband, MMIC LNA incorporates a bypass mode feature to extend system dynamic range. This model operates from 0.4 to 8 GHz and achieves an industry leading...

Expanded Thin-Film Filter Selection

June 6, 2024
Mini-Circuits has expanded our line of thin-film filter topologies to address a wider variety of applications and requirements. Low pass and band pass architectures are available...

Mini-Circuits CEO Jin Bains Presents: The RF Engine of the 21st Century

June 6, 2024
In case you missed Jin Bains' inspiring keynote talk at the inaugural IEEE MTT-S World Microwave Congress last week, be sure to check out the session recording, now available ...

Selecting VCOs for Clock Timing Circuits A System Perspective

May 9, 2024
Clock Timing, Phase Noise and Bit Error Rate (BER) Timing is critical in digital systems, especially in electronic systems that feature high-speed data converters and high-resolution...