Software Speeds Design Of Complex Modules

June 15, 2011
The latest release of this popular suite of software design tools helps users improve design accuracy, increase their own productivity, and ultimately speed time to market.

MICROWAVE OFFICE brought the combination of computer-aided-engineering (CAE) design power and ease of use to the personal computer (PC) over 13 years ago. It was a tool that aided RF/microwave design engineers without requiring a major investment in a special computer, running on standard 32-b PCs. Since that time, both PCs and the program have grown considerably. The latest upgrade to that original CAE software AWR 2011is a suite of tools that includes Microwave Office, the Analog Office, the Visual System Simulator (VSS), and the versatile AXIEM electromagnetic (EM) simulator. AWR 2011 is written for today's computersmulticore, 64-b machinesand designed to completely redefine engineering productivity, delivering more accurate results faster and easier than ever before.

AWR 2011 (Fig. 1) represents a positive evolution of that earliest version of Microwave Office introduced at the 1996 IEEE MTT-S Exhibition (Baltimore, MD). Fueled by 13 years of user feedback, it is now a suite of tools that can streamline the RF/microwave design process, resulting in greatly enhanced design productivity.

How does AWR 2011 streamline and speed the design process? The answer depends on the specific design, but a power amplifier (PA) module based on multiple monolithic-microwave integrated circuits (MMICs) can serve as an example. Following tedious design steps to develop working MMIC chips, issues can arise with higher-level circuit schematic and layout designs that reveal the need for modifications to the ICs. EM verification at this stage can be time consuming, as can the required design-rule-checking (DRC) and design-for-manufacturing (DFM) steps for optimizing yield.

In AWR 2011, the individual MMICs must still be designed. But as the design evolves at the module stage, the software's new group-design capability helps resolve conflicts quickly as chips are integrated into the module level of the design. AWR 2011 features asynchronous EM simulation, which allows solvers to run in the background as more details are gathered on different aspects of the design. Simulation of an initial imported design can begin immediately. An initial simulation will treat module metal as shorts or microstrip transmission lines.

As the complexity of the module grows and higher-level simulations are required, these same circuit elements will include coupling, while also allowing the "as-complete" analyses to become available for circuit and system simulation. This provides assurance that subcomponents of the overall module design will be imported correctly and that budget verification and other system-level simulations can begin sooner. Design of the module circuitry can continue even before the first module-level EM simulation is complete.

The use of asynchronous EM simulation, group design, and various other capabilities in AWR 2011 accelerate module design flow by creating a lower-risk mask design following final verification of electrical performance. This allows designers, for example, to further explore interactions between MMICs and PCB transmission lines and on-board components, such as filters.

Of course, asynchronous EM simulation has often been associated with fracturing or fragmenting a designbreaking a large circuit into smaller subcircuits for ease of simulation, and possibly introducing differences between what was originally desired for simulation. Such design fracturing has traditionally meant long processing times for recompiling the fragments back into the original design. But AWR 2011's asynchronous EM simulation support (Fig. 2) eliminates the waiting time. Users can continue working while their EM analyses run transparently in the background on multiple-core processors on their PC. For even more speed, AWR 2011 will soon be capable of taking advantage of distributed processing on multiple computers, whether as parts of networks or clusters.

The results of asynchronous simulations can be effectively managed with AWR 2011's Simulation State Management (SSM) functionality (Fig. 3). Job queuing allows different design scenarios to be scheduled immediately and run in parallel; a visual batch manager/controller provides monitoring and control of all scheduled jobs. The results of all scheduled jobs are automatically updated as they are completed. Updating can affect a single simulation just completed, or can be used to launch additional simulations that are dependent upon a job just completed.

AWR 2011's asynchronous simulation capabilities include parallel simulations on fully parameterized EM models, including materials and geometries. Each instance of a swept EM simulation can be run in parallel to reduce overall simulation time. Monte Carlo simulations of EM structures can also be run in parallel to save time. For example, a parallel yield analysis on the PA module using graphical modifiers can automatically simulate the impact of manufacturing effects such as mask registration errors, etching tolerances, die placements, or substrate variations. Different EM analyses can be sent to various compute nodes at different levels of accuracy, simulation speed, and even different conditions to enhance overall simulation speed.

AWR 2011 incorporates a new approach to managing simulation results within the design environment for both synchronous and asynchronous simulation data. SSM efficiently manages simulation results from optimization runs, swept simulations, or Monte Carlo analyses. All of the EM data, including for structures, meshes, currents, yield analyses, and optimization, is effectively managed. Users can plot and view results for all of the simulators within the software suite, allowing, for example, comparison of EM, harmonic-balance, and transient-analysis results for greater insight into a design's behavior.

SSM maintains a history of simulation states and uses a "checkpoint" approach, allowing for easy access to a current simulation state or any previous state. All simulation results can be stored in data sets and managed by SSM, so user can control the amount of simulation history retained as the design progresses, making it easy to return to previous results without re-running any new simulations. SSM supports a "per-simulation" approach to data sets for more granular control; it also keeps track of which data sets match the current state of the design, minimizing errors introduced as a result of importing data from a nonoptimal design iteration. Users can feel confident that the schematic and layout window view they are seeing are exactly what is being simulated in EM. But users can also use a "data pinning" feature to override AWR 2011's data synchronization for exploring different design possibilities using previous design states.

AWR 2011's unified-data-model (UDM) architecture now incorporates parameterized, graphical geometry manipulation, so that shapes can be modified while an entire design remains synchronized with respect to parameterized geometry. EM permutations can be invoked and controlled with a mix of graphical, equation-based, and rule-based parameterization. In addition, a geometry processing algorithm (Fig. 4) allows automated conversion of mask-ready geometries to EM-ready layouts. This fully automates many operations such as via creation and de-featuring that would normally require manual modifications to the geometry. When used with EM extraction, process-defined geometry processing can eliminate manual steps, speeding the EM extraction process.

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EM yield analysis has traditionally been a manual process. In AWR 2011, it is incorporated into the design process. With the software's parametric and schematic EM shapes, RF/microwave designs can include arbitrary shapes and geometries, along with user-defined layers that take into account manufacturing-related effects, such as mask alignment and etch tolerance. By overlaying these with SSM capabilities, users can track variants such as finding corner cases (Fig. 5), sweeping manufacturing-related parameters, or monitoring overall performance of circuit simulations in linear, harmonic balance, or time-domain circuit simulations. Even system-level parameters, such as error vector magnitude (EVM), adjacent channel power ratio (ACPR), or bit error rate (BER), can be made part of a design.

Group designthe process of incorporating different technologies in a designhas long been a compromise in trying to achieve proper interaction among different software files. It typically has required rigid design sharing and reuse or massively redundant approaches that were memory intensive and slowed processing speed. Microwave Office has long included support for multiple technologies or mixed process design kit designs, but now AWR 2011 can manage data and resolve conflicts as subdesigns are combined and merged into a module or subsystem. It allows schematics, layouts, EM analysis, and measurements to be imported from existing circuit designs, as well as multiple sets of global and output equations. Conflicts are identified when files are imported and can be addressed immediately. This ensures that blocks remain self-synchronized as the complexity of a design increases.

AWR 2011 provides users with access to the components of EM schematics. The shapes in these schematics, either parameterized cells (pCells) or "static" shapes, can be manipulated for fine control of an EM parameterized model (Fig. 6). A variety of Boolean and other operations can be performed that go considerably beyond just changing an aspect ratio or making a shape bigger. These customized EM models can be simulated as desired and optimized for enhanced processing speed, to check stand-alone performance, and for interaction with nearby structures.

In the example PA module, a user-defined parameterized model could be any critical section of interconnection. A designer may choose to trade-off one dimension against another, such as two coupled lines or one line length versus meandered transmission lines occupying a smaller area of PCB. The modification can be designated as an "element" within the design, tunable and optimizable throughout the remaining design steps. Along with EM-centric user productivity enhancements in AWR 2011, a number of other features help to speed overall design time. This latest version of the software suite includes such features as the VSS RF Budget Analysis spreadsheet wizard to eliminate duplicate data entries, floating windows for ease of use, increased granularity in the EM options panel, expanded nonlinear models in all harmonic-balance simulators, and enhanced MDIF reader, and multiple-output global equations to simplify and speed import of up-front design information and performing post-processing of results from simulations.

Among these features, the envelope simulator expands co-simulation between Microwave Office and VSS so that users can simulate circuit-level, time-variant phenomena such as memory effects in digital predistortion (DPD) configurations that rely on dynamic bias or envelope tracking methodologies (Fig. 7). This allows designers to understand the effects of different modifications to final performance metrics such as EVM and ACPR much earlier in the design. Subcircuit parameterization allows nonlinear circuits in Microwave Office to share the same hierarchical parameterization as blocks within VSS so that, for example, it is possible to study the impact of changes to a resistance value or inductor quality factor (Q) on the system-level performance of a design.

Also in AWR 2011, AWR Connected for CapeSym SYMMIC allows MMIC designers to capture and view interdependencies between thermal and electrical properties (Fig. 8) and address them throughout the design process. An "RF-aware" short/open checker looks for wiring and layout errors, eliminating them at earlier (less costly) stages of a design process. In addition, the plug-and-play compatibility of AWR 2011's EM tools with third-party EM tools is also a boost for design productivity, allowing interaction between tools quickly.

In short, the AWR 2011 suite of software toolsMicrowave Office, VSS, Analog Office, and AXIEMhas grown in power and sophistication since its beginnings in 1998. The latest enhancements in AWR 2011 help maximize users' productivity, eliminate design errors and redundancies, and speed the time to market for an RF/microwave design, making a good CAE software tool even more powerful and practical. To get started using AWR 2011 or to learn more, visit

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