A four-channel, 16-b digital-to-analog converter (DAC) has been spawned to help wireless base-station manufacturers increase bandwidth performance without raising power consumption. At 1.25 GSamples/s, the DAC3484 claims to be 25 percent faster than its closest competitor while consuming as little as 250 mW per channel. The DAC3484 is also 40 percent smaller than alternative quad-DAC solutions. Its 16-b interleaved, high-speed, 1.25-GSample/s input vows to halve the input/output (I/O) count compared to devices using slower-rate I/Os. With a low-jitter, 2X to 32X phase-locked loop (PLL), the DAC also eliminates the need for an external, low-jitter clock multiplier to match the interpolated rate.
In addition, 2X to 16X interpolation and two independent, 32-b numerically controlled oscillators (NCOs) promise to lower the interface rate and cost of FPGAs. They also provide flexibility in frequency planning. With offset, gain, group delay, and phase control for system calibration, the DAC3484 improves sideband suppression for wideband signals when interfacing with in-phase/ quadrature (I/Q) modulators, such as the TRF372017, in direct upconversion radios. The DAC also enables wideband power-amplifier linearization to 250 MHz. In fact, the wider-input-bus DAC34H84 or the two-channel DAC3482 are available to support linearization bandwidths to 500 MHz.
The DACs target third-generation (3G), Long Term Evolution (LTE), WiMAX base stations and repeaters, and software-defined radios (SDRs). Production quantities will be available in the second quarter of this year. Pricing is expected to be as follows: $58.60 for the DAC3484 and $33.50 for the DAC3482 in 1000-unit quantities; both are currently sampling in a 9-x-9-mm, multirow QFN package. The DAC34H84, which is currently sampling in a 12-x-12-mm BGA package, is expected to be priced at $60 in 1000-unit quantities.
Texas Instruments, Inc., P.O. Box 660199, Dallas, TX 75266-0199; (972) 995-2011, www.ti.com.
