Breker Verification Systems

San Jose, CA 95131

COMPANY OVERVIEW

About Breker Verification Systems

Breker Verification Systems solves challenges across the functional verification process for large, complex semiconductors.

Contact

1879 Lundy Ave.
Suite 126
San Jose, CA 95131
https://brekersystems.com/
+1.650.336.8872
+1.650.230.4916

More Info on Breker Verification Systems

Breker Verification Systems solves challenges across the functional verification process for large, complex semiconductors. This includes streamlining UVM-based testbenches for IP verification, synchronizing software and hardware tests for large system-on-chips (SoCs), and simplifying test sets for hardware emulation and post-fabricated silicon. The Breker solutions are designed to layer into existing environments.

Our Trek family of products is proven in production at many leading semiconductor companies worldwide. As a leader in the development of the Accellera Portable Stimulus Standard (PSS), Breker has earned a reputation for dramatically reducing verification schedules in advanced development environments. The company’s solutions enable design managers and verification engineers to realize measurable productivity gains, speed coverage closure and easily reuse verification knowledge.

TrekSoC and TrekSoC-Si help customers develop intuitive models, based on the PSS, to describe the verification space, and then use these models to automatically generate SoC test cases including stimulus, expected results and coverage detail. TrekUVM uses the same scenario model format to generate Universal Verification Methodology (UVM) test cases for transactional testbenches, all but eliminating the notorious complexity of UVM sequence authoring. These solutions enable test reuse across simulation, emulation, prototyping and actual silicon, eliminating redundant effort across the development flow.

Breker also produces a range of “apps” to provide push button solutions for common system verification problems. The Cache Coherency TrekApp verifies system-level coherency in a multiprocessor SoC. The Power Analysis TrekApp automates the verification of power domain reset states in a multi power domain device. The ARMv8 TrekApp handles typical processor test issues and is focused primarily on the ARM device range. Customers can begin testing earlier in the process, even before RTL coding is complete, and expand incrementally to realize greater coverage.

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