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Pushing Process Equipment Forward

Pushing Process Equipment Forward

In this Q&A, Dr. Ajit Paranjpe, chief technology officer at Veeco Instruments, discusses topics ranging from gallium-nitride technology to advanced packaging.

Can you tell us a little about Veeco?

Veeco designs and manufactures materials engineering and thin-film process equipment for high-tech electronic-device production and development worldwide. Since our IPO in 1994, we have delivered innovative metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), atomic layer deposition (ALD), advanced packaging lithography, laser annealing, 3D inspection, ion beam, solvent etch/clean, and related technologies to our valued customers.

What markets are being enabled by the company?

Veeco’s innovations are used in the development of advanced compound semiconductor products for solid-state lighting/displays (e.g., micro LED) as well as power/RF (e.g., HEMTs for 5G); photonics for 3D sensing (e.g., VCSEL, LiDAR, and augmented reality) and data communications (e.g., Big Data and autonomous vehicles); and advanced semiconductor devices for logic and memory applications (e.g., AI and IoT).

Can you explain what Veeco is doing in terms of GaN-on-Si development?

Recent industry efforts to effectively grow gallium-nitride (GaN) layers on silicon substrates (GaN-on-Si) are finally paying off. However, there are some gaps to be aware of, including the cost of epitaxy and downstream device processing and packaging. Other issues include charge trapping and current collapse, which are being actively resolved to meet reliability targets.

To make significant inroads into GaN Power and RF applications, next-generation production systems using Si substrates need to be adaptable to a wider process window and offer the highest throughput combined with the lowest cost of ownership. These known gaps imply stringent requirements on epi quality.

Veeco is at the forefront of GaN-on-Si development in collaboration with leading device companies and research institutes. First, the epitaxy layers, which often include superlattices, must be deposited with excellent thickness and composition uniformity across the wafer. Customers also demand accurate dopant control with sharp interfaces to optimize the device properties. There can be zero memory defects to effectively incorporate dopants such as Mg and Fe in specific layers.

Veeco is helping customers solve tough challenges of transistor performance, RF loss, harmonic distortion, and device reliability by leveraging its single-wafer TurboDisc technology that provides industry-leading dopant control and compositional uniformity while reducing the epitaxial growth cost-per-wafer. This is achieved by leveraging the Propel MOCVD system’s superior film-deposition control for high-quality buffer growth and its capability to incorporate such dopants.

What do you think the future holds for GaN technology?

GaN’s advantages enable high-current density and fast switching with low on-resistance, enabling smaller footprint devices with high temperature operation and the lowest conduction and switching loss. As mentioned earlier, while this brings significant opportunities and advantages to compound semiconductor manufacturers, the form factor and power gains come with associated challenges.

GaN industry forecasts have been pushed out over the last few years because of integration and reliability issues. Traditional players continue to hedge their bets by investing in silicon carbide (SiC). But incumbents, as well as innovative market entrants, are increasingly investing in GaN. The need for high efficiency, high frequency, and small form factors bode extremely well for GaN moving forward.

According to Yole, in the power IC segment, the market is expected to grow at 82% CAGR, from $18 million in 2017 to $445 million in 2022. While most devices are still concentrated in the low-voltage category (≤200 V), many customers have qualified mid-voltage (600/650/700 V) devices for power supplies in data centers and EV/HEV converter applications.

In RF, the ambitious scope of 5G promises to transform cellular communications, creating new opportunities for wireless carriers and service providers. Such a high-speed network is currently being planned with a vision of >10-Gb/s transmission speeds for mobile broadband (phones/tablets/laptops) and ultra-fast, low-latency performance for IoT applications (V2X communications).

GaN is slowly replacing silicon in specific wireless applications (e.g., RF power amplifier front ends of 4G/LTE base stations), and next-generation 5G deployment will involve additional use of GaN technology. Before 5G, there was increased use of GaN-on-SiC in the macro cell. 5G will bring in GaN-on-Si to rival GaN-on-SiC designs with inroads into the small-cell space (micro and metro cells) before potentially overlapping into femtocell/home routers and handsets.

Tell us about the company’s advanced packaging technology.

Veeco’s advanced packaging portfolio includes the flagship AP300 lithography stepper built on the company’s customizable Unity Platform, delivering superior overlay, resolution, and sidewall profile performance and ability to process bowed/warped wafers. This combination enables highly automated, cost-effective manufacturing valued by foundries and outsourced assembly and test (OSAT) providers in advanced logic/memory packaging applications such as fan-in wafer-level packaging (FIWLP), fan-out WLP (FOWLP), through-silicon via, silicon interposer, and copper (Cu) pillar bumping.

In terms of AP outlook, 5G implementation is expected to begin driving production ramps in the Q3 2019 timeframe. Server/cloud industry Big Data, AI, and edge-computing demands will require more processing power and higher bandwidth memory, driving demand for silicon interposer and fanout on substrate solutions.

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