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IR-UWB Transmitter Could Support Gigabit Rates

THE FLURRY OF development around ultra-wideband (UWB) opportunities has led to the creation of many types of transmitter designs. Recently, for example, a 5-kV electrostatic-discharge (ESD)-protected impulse-radio (IR) UWB transmitter was implemented in 0.18-m CMOS. It employs a fifth-order Gaussian pulse generator and binary-phase-shift-keying (BPSK) modulation for large information capacity over the UWB frequency range of 3.1 to 10.6 GHz. A simple architecture and low circuitdesign complexity also were envisioned by the transmitter's creators: Xin Wang, Jian Liu, Qiang Fang, Hui Zhao, and Albert Wang from the University of California; Siqiang Fan and Bin Zhao from Fairchild Semiconductor; He Tang from Omnivision Technologies; Lin Lin from IBM Microelectronics; and Li-wu Yang from TransRF Corp.

The simplicity of the design comes from the fact that it does not employ an inductor, buffer, or amplifier, which also enables the small, largely digital CMOS design. The transmitter consists of two main functional circuit portions: a data-modulation section and pulse-shaping block. The researchers relied on both ESD simulation and ESD-RFIC co-design, which allowed them to simultaneously optimize performance for both UWB transmitter and ESD protection at the chip level.

Given its performance, the transmitter can potentially serve Gigabit-per-second wireless-communications applications, such as streaming data and video. Measuring just 0.25 mm2, the IRUWB transmitter consumes 0.14 pJ/p-mV. It offers a short pulse width of θ ≤ 394 pS. When put through full-chip ESD stress testing, it demonstrated a whole-chip protection level of 2.5 kV. See "A Whole-Chip ESD-Protected 0.14- pJ/p-mV 3.1-10.6-GHz Impulse- Radio UWB Transmitter in 0.18-m CMOS," IEEE Transactions On Microwave Theory And Techniques, April 2011, p. 1109.

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