Amplifying PA Theory For Efficient ISM Transmitters

Amplifying PA Theory For Efficient ISM Transmitters

Performance trade-offs must be carefully managed to achieve high efficiency at the required gain and current consumption in cost-sensitive ISM-band transmitters.

Short-range applications in the industrial-scientific-medical (ISM) bands between 300 and 450 MHz are rapidly expanding. Key components for these applications are low-cost amplitude-shift-keying (ASK) and frequency-shift-keying (FSK) transmitter integrated circuits (ICs), although proper system design involves balancing output-power and current-drain requirements for the transmitter's power amplifier (PA). Fortunately, some straightforward techniques make it possible to manage this trade-off while still maintaining good PA efficiency.

The PA on a variety of low-cost transmitters and transceivers from MAXIM Integrated Products ( Sunnyvale, CA), for example, the models MAX1472, MAX7044, MAX1479, and MAX7030/MAX7031/MAX 7032, allow the user to control the RF power-/current-drain trade-off while maintaining high efficiency. Especially for low-cost short-range ISM applications, managing that trade-off is critical to maximizing battery life. Those particular ICs require no modifications when managing the trade-off; simply changing the load impedance presented to the PA can change the PA's output power and current drain.

Linear Class A amplifiers are characterized by a combination of bias point and signal level where the device's average current drain does not change with the magnitude of the input signal. In Fig. 1, M1 can be assumed to be a current source of magnitude IDC. For maximum output power, the impedance is:

with maximum output power defined as:

According to Eq. 2, the peak efficiency is 50 percent. 1 This assumes that the drain voltage of M1 can swing to ground while still maintaining a bias current of IDC. Operation in the triode region limits the practical efficiency of a Class A CMOS PA to less than 40 percent. As this analysis implies, the bias current of a Class A amplifier must be changed to maintain a reasonably high efficiency for different output-power levels for a given supply voltage. Class A amplifiers are most amenable to modulation schemes where linear amplification of the input signal is important, since the bias point does not change with the magnitude of the input signal. Class B and C amplifiers offer higher efficiency than a Class A amplifier, but usually with greater distortion-and at reduced output-power levels.

A common characteristic of all Class A, B, and C CMOS amplifiers is that the active device is considered to be a voltage-controlled current source and operation in the triode region is undesirable. In contrast, Class D, E, and F CMOS amplifiers rely on operation in the triode region for optimum efficiency and output power. These amplifiers are often called "switching-mode" amplifiers and are typically used in ISM-band transmitters and transceivers because of their inherent high-efficiency operation at low voltages. In a switching-mode amplifier, the output device is driven by a large-signal square wave (Fig. 2).

In a switching-mode amplifier, the output transistor can be thought of as a resistor that is switched on and off at the operating frequency with a given duty cycle. The current in the output device can be very rich in harmonics. The harmonic content depends on the duty cycle and magnitude of the driving waveform, the field-effect transistor's (FET's) "on" resistance, and the impedance presented to the PA. In a Class D amplifier, the duty cycle of the input signal is varied to control the output power, a process known as pulse-width modulation (PWM). Class D amplifiers are commonly used in audio applications where the output power changes constantly.

In a Class E amplifier, the duty cycle of the input signal is fixed. The matching network is designed to minimize the voltage at the drain terminal of the switching while the switch is on. By minimizing the voltage across the output device while the output device draws current, one can minimize the power dissipated by the switching device and, therefore, maximize PA efficiency.

A Class F amplifier is similar to a Class E amplifier, requiring special attention to the harmonic impedances in the design of the matching network in order to enhance efficiency. In general, the matching circuits for Class F amplifiers are more complex because of the design constraints placed on harmonic impedances.

All CMOS ISM transmitters and transceivers from MAXIM Integrated Products provide an open-drain PA output. The duty cycle of the driving signal is a constant 25 percent from 300 to 450 MHz. A user designs the matching network needed for the desired output-power, current drain, and harmonic performance levels.

Figure 3 shows a simple model for a switching mode PA, where Rsw is the on-resistance of the FET, Cpa is the effective sum of the device parasitic capacitances, Cpkg is the package capacitance, and Cboard is the printed-circuit-board (PCB) capacitance. The table summarizes the typical switch resistances and capacitances for various ISM transmitters and transceivers from MAXIM. In the table, typical switch resistances are given for VDD = 2.7 V; the PCB parasitic capacitance can vary significantly with layout. The matching network and, therefore, the waveform at the PA's output, should be designed to maximum PA efficiency. Maximum efficiency occurs when the voltage across the device is low when the switch is closed. For help on matching-network design for Class E and F amplifiers, readers can find guidance in refs. 2-4.

In many low-cost ISM applications, the system designer may not have much flexibility in design time, cost, or complexity to optimize the PA matching network for maximum efficiency. Small (high-Q), inexpensive antennas are generally more efficient at transmitting higher frequencies, but regulatory concerns limit the harmonic content of the transmitted signal. Therefore, harmonic attenuation by the matching network is extremely important. Considering these facts, we analyzed the switching PA with the assumption that the output-matching network will be designed so that the voltage at the drain is highly filtered and therefore sinusoidal (Fig. 4).

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Assuming that the PA is loaded with a resistance of RL and that the output voltage can swing as low as 0.1 V, the efficiency of the PA can be expressed as:

Efficiency = 0.5DD ? 0.1)2 /RL>/{V2DD/(4Rsw) × DD ? 0.1)/23/2VDD/π>} (3)

If VDD = 3 V, Rsw = 22 Ω and RL = 400 Ω then the PA efficiency is 80 percent with an output power of +10.2 dBm. Of course, the voltage waveform, the switch resistance, and the load impedance are interdependent, so the above equation cannot be used as an accurate predictor of efficiency for all combinations of the those variables. For this reason, SPICE has been used to model the performance of an ideal switching-mode PA. An ideal switched resistance of 11 or 22 Ω is placed across a parallel tank circuit with a Q of 10. The simulation schematic is illustrated in Fig. 5 and the simulated results are shown in Fig. 6.

As Fig. 6 indicates, one of the most significant advantages of the switching-mode PA is that the output power can be varied over a wide range by changing the load presented to the PA while maintaining excellent DC-to-RF efficiency. In addition, a switching amplifier with a lower switching resistance can put out more power at a higher efficiency, when compared to a higher switching resistance. The drawback of a lower switching resistance is that a higher driver current is required to charge and discharge the parasitic capacitance of the switching device.

To maximize the efficiency of a switching-mode amplifier, the switch must be turned on only near a minimum in the voltage waveform. For the example of the switched resistor loaded with a simple parallel resonant circuit, this requirement can be satisfied by minimizing the imaginary component of the impedance presented to the PA at the operating frequency (including the parasitic capacitances of the device, package, and PCB). If the network is not at resonance, or detuned, the efficiency can degrade significantly. Figure 7 shows the performance of an ideal switching-mode amplifier if the matching network is off resonance for Q = 10 and Q = 5.

As shown in Fig. 7, a current-drain minimum occurs at resonance. This fact can be used to verify that a given network has been optimized for a particular operating frequency. It should also be noted that the SPICE simulations assume that: the switch resistor can be turned on and off instantly; the parasitic capacitance of the switched device does not change as the device is turned on and off; and there is no loss or parasitic impedances in the tank inductor or capacitor. These factors can degrade the performance of an actual switched-mode amplifier when compared to the ideal simulations. An iterative approach is often required to optimize the PA matching network for a particular application.


  1. Behzad Razavi, RF Microelectronics, Prentice Hall, Englewood Cliffs, NJ, 1997.
  2. N.O. Sokal and A.D. Sokal, "Class E: A New Class of High Efficiency Tuned Single-Ended Switching Power Amplifiers," IEEE J. Solid-State Circuits, Vol. SC-10, pp. 168-176, June 1975.
  3. Scott Kee, Ichiro Aoki, Ali Hajimiri, and David Rutledge, "The Class E/E Family of ZVS Switching Amplifiers," IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-51, No. 6, May 2003.
  4. Eileen Lau, Kai-Wai Chiu, Jeff Qin, John Davis, Kent Potter, and David B. Rutledge, "High-Efficiency Class-E Power Amplifiers, Parts I and II," QST (Journal of the American Radio Relay League), May and June 1997.
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