Achieving High Gain Over Broad Bandwidths

By computer optimizing key circuit elements and applying negative feedback, level transistor gain can be achieved over very broad bandwidths.

Transistor gain (S21) usually falls off with frequency. To create an amplifier with fairly constant gain over a broad bandwidth, otherwise known as a broadband amplifier, the transistor's input and output circuits must be arranged to favor the high end of the band and, possibly, to increase the mismatch at the low end of the band. Part seven of this eight-part series on transistor amplifier design will examine what needs to be done to achieve high gain over broad bandwidths.

There is no closed-form solution to this task. Some very clever engineering has been applied to the problem, but ultimately a certain amount of creativity and guesswork is required to obtain good results. This is a perfect application for "computer-assisted guessing," otherwise known as optimization.

The optimization process usually begins by first stabilizing the transistor. Then, to create a design starting point, the unilateral design is used, neglecting the feedback term, S12. Following this, matching networks are designed using optimization to tailor the input and output gains to obtain a broadband result.

A different approach involves the use of feedback. As an example, consider the HP AT415868 bipolar transistor from Agilent Technologies (Palo Alto, CA). The transistor is characterized by the S-parameter data presented in Table 1.1 It is always a good idea to look at such a data file to check that there are no typographical errors (there is one in this table, a missing decimal point for the 700-MHz data). Customarily, there is no data for zero frequency (DC), since the network analyzer used for measurements does not operate at DC. The network simulator will interpolate the data to zero frequency, but this is a mathematical interpolation. It is known that the phase angle for zero frequency is 180 deg. (perfect negative feedback), so it is best to modify the file accordingly. The corrected and revised file is shown in Table 2.

Using these revised parameters, the calculated stability data are shown in Fig. 1. The transistor is potentially unstable over most of the DC-to-6000-MHz band. However, K is nearly equal to unity over much of the band.

The input and output stability circles for 1 GHz are shown in Fig. 2. The device is nearly stable at 1 GHz except for very low impedances presented to the input circuit. Therefore, stability can be improved by adding a low value of resistance in series with the base lead.

Examining the S21 parameter in Table 2 reveals that the gain with a 50-Ω source and load varies from 31.9 dB at 100 MHz to 17.1 dB at 1000 MHz. Suppose that the amplifier s required to have a flat gain characteristic from 50 to 1050 MHz. This bandwidth encompasses the entire VHF and UHF television transmission bands. Negative feedback will be used to design the amplifier, with more feedback at low frequencies than at high frequencies.

The feedback from the collector to base is negative. To favor high frequencies, these leads will be interconnected with a series RL circuit. An impedance in the emitter to ground path also provides negative feedback. To favor high frequencies, a parallel RC network will be used there. Figure 3 shows the results of using this circuit with nominal values. Prior to optimization, the performance does not look promising with respect to the design goals, since the gain varies by 24 dB over the desired bandwidth.

Next, the circuit of Fig. 3 was optimized using the network simulator,1 with performance goals of Mag = 15 dB, K > 1.1 and B1 > 0.1.The question marks ahead of the element values allow the optimizer to vary those values. The relative weightings (W) of the errors used in the simulator optimization were unity for all variables except K, for which W = 10. This "optimization weighting factor" is important. It causes an error of 0.1 in K is to be considered equally with a gain error of 1 dB by the optimizer. Note that the 15-dB goal for the gain was set below the minimum gain of 17.1 dB established from the S-parameter data.

Starting with nominal initial component values shown in Fig. 3, the network simulator was used to optimize the circuit, with the results shown in Fig. 4. Capacitor C1 can be eliminated because the optimized value is near zero. The gain is within 0.4 dB of 15 dB over the entire 50-to-1050-MHz band, a 20-to-1 frequency ratio. The stability factor K was 1.1 or greater and B1 was greater than 0.1 over the whole gain range of the transistor, from DC to 6000 MHz. Possibly less gain variation and/or a wider bandwidth could be obtained, but this result is remarkable for the fact that only four components (not counting capacitor C1) were used to achieve the result and their function had to include unconditionally stabilizing the transistor over the DC-to-6000-MHz frequency range.

During the initial optimization trials a gain goal of 16 dB was set. This gain was obtained with even smaller variation with frequency, but the resulting amplifier was potentially unstable (K < 1) over most of the DC-to-6000-MHz bandwidth. Reducing the gain goal to 15 dB did not yield a stable amplifier until the weighting factor of K was increased from 1 to 10, emphasizing the importance of this goal. From this example, it can be seen that fairly narrow margins exist around the achievable goals with a particular transistor and its circuit. Setting goals within the margins is a crucial part of the optimization.

When amplifier stages are cascaded which have significant input and output mismatches, there is a mismatch error in estimating that their total gain in dB will be the simple sum of their individual gains. Next month, the final part of this transistor-amplifier design series will examine how to cascade stages while encountering little mismatch error.

1. Genesys 7 program and transistor S parameter database, Eagleware Corp., Norcross, GA. This is the CAD program used as a network simulator for the examples of this text.

This article series is excerpted with permission from the one-week industrial course, Wireless Engineering, and from High Frequency Techniques, An Introduction to RF and Microwave Engineering by Joseph F. White (John Wiley & Sons, Hoboken, NJ, 2004;

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