Improvements in solid-state power amplifiers depend on advances in transistors. Fortunately, evolving gallium nitride (GaN) high-electron-mobility-transistor (HEMT) technology is bringing many benefits to high-frequency amplifier designers. A key advantage of GaN HEMT devices over other transistor technologies is the high power density possible from relatively small transistor cells. For example, HEMT devices from Cree are capable of operating at RF power densities as high as 8 W/mm of gate periphery due to the superior thermal properties of their silicon carbide substrates. Such power density has made possible a line of 120-W power transistors for a wide range of commercial and military applications.

One member of the transistor line, model CGH40120F, consists of a single unmatched GaN HEMT device in a small, industry-standard ceramic-metal package. It provides 120 W saturated output power for general- purpose military and industrial applications including digital video broadcast (DVB), homeland security, tactical communications, and radar systems. The transistor has been demonstrated in various amplifier applications, including a reference amplifier with 1200-to-1400-MHz instantaneous bandwidth, 100 W CW typical output power, 16-dB typical small-signal gain, and 75-percent typical power-added efficiency over the full band. Addi- tional amplifier designs operating at +28 VDC have been demonstrated from 800 to 1300 MHz with 90-W output power and 65-percent efficiency for tactical data links as well as amplifiers for 1450-MHz DVB with 40-W average power, 19-dB gain, and backed-off-power efficiency of 40 percent when used with 16 QAM orthogonal-frequency-division-multiplex (OFDM) signals.

As examples of impedance-matched transistors in the GaN HEMT family, models CGH21120F and CGH25120F consist of single, input impedance-matched GaN HEMT devices with 120 W saturated output power housed in small, industry-standard ceramic-metal packages. Suitable for modulated signal amplification in W-CDMA, LTE, and WiMAX systems, the devices feature convenient matching to 50-Ohm environments over 30-percent instantaneous bandwidths. The CGH21120F is designed for 1800 to 2300 MHz while the CGH25120F is optimized for 2300 to 2700 MHz. Demonstration amplifiers have been developed for each transistor. Model CGH21120F achieves 110 W peak CW power at 70-percent efficiency and 16-dB gain. With W-CDMA 3GPP signals, it provides 20 W average power and 35-percent efficiency under Class AB operation.

The same 28.8-mm-gate-width device die are used in all of these new GaN transistors, based on a 0.72-mm unit cell, which also forms the basic building block for the company’s large-signal models. The model for this die is scaled by a factor of 40:1. For such scaling to be effective, the measured and modeled data for the unit cell must be in close agreement. By developing an accurate and scalable large-signal model at the cell level, scaling will provide meaningful results in the design of much larger power transistors.

Another critical aspect of power transistor modeling involves package modeling. Cree has developed a physically derived modeling approach that includes package interconnection parasitic effects. The approach is based on S-parameter measurements of package elements, electromagnetic (EM) package simulations, and quasi-static wire-bond models. Since the reference planes for such package models are usually defined at the package body, any subsequent circuit modeling must take into account any physical distances between printed-circuit-board (PCB) traces and the package body. The effect of any ground-plane discontinuities should also be taken into account when building the model. This becomes particularly important when using large power transistors with low input and output impedances at frequencies greater than 2 GHz.

The general design technique for all of these high-power amplifiers is to first load-pull the transistor model within a harmonic-balance simulator such as Microwave Office from AWR. When performing source and load pulling of a device for modeling, it is essential that it remains stable in this unmatched environment in order to provide valid data. The source and load impedances of the device form the basis for initial circuit design.¹ Once the initial circuits are synthesized, a complete amplifier is simulated, optimized, and refined. Finally a completely model-driven layout with all required electromagnetic (EM) blocks is used to generate a PCB layout.

A number of CGH40120F-based amplifiers have been designed using a common PCB approach. A single frequency match to the transistor’s source and load impedances was determined using Smith chart matching to provide a starting point for the optimization of the input and output matching networks.¹ The networks were then optimized to give better than 20-dB return loss across the desired bandwidth. This was achieved by allowing the capacitors to “slide” along the fixed transmission lines with varying values as required. No more than six elements were optimized simultaneously to ensure that the optimizer could rapidly converge to a solution. Once the initial networks were designed, the complete amplifier was optimized to achieve the desired performance goals. Any optimized capacitor values were reset to standard values to ensure that the amplifier could be assembled using standard capacitors.

Figure 1 shows full circuit simulations for both the small-signal (a) and large-signal (b) performance of an 800-to-1300-MHz amplifier design. Amplifiers for telecommunications applications based on the CGH21120F and the CGH25120F devices were designed using a distributed matching technique with transmission lines to implement the input and output networks. This approach was used since these designs operate at higher frequencies, albeit at slightly reduced bandwidths, where the parasitic effects of via inductance and capacitor resonances are much more difficult to accurately model.The amplifier designs for the two transistors are able to cover many different applications due to the inherent high power bandwidth of these GaN HEMTs.

These amplifiers were also designed using layout-driven simulation. When designing high-quality-factor (high-Q), effectively “narrowband” amplifiers with GaN HEMTs, it is important to perform sufficient stability analyses to prove that any designs will not oscillate once assembled. Typically, there are three key techniques (as apparent in the layouts) used to stabilize GaN HEMT devices in narrow-band amplifier designs: the use of a high-pass, low-frequency stabilization network in series with the input match, a series resistive gate feed, or series stabilization resistance in the RF input path close to the device.

These designs were optimized for maximum peak power and efficiency while maintaining high gain at typical average power levels. Since these amplifiers must meet stringent linearity requirements (high peak-to-average-power ratios), digital predistortion was employed to achieve the required linearity without compromising efficiency at backed-off output-power levels. Although amplifier linearity may not be a key parameter for some designs, careful attention was paid to minimizing absolute distortion levels. This ensures that any commercially available digital predistortion solution may be applied and provide compliance to spectral masks and error-vector-magnitude (EVM) requirements.

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