[Computer-Aided Engineering] RF Design Environment Closes Verification Gap When integrated with industry-standard IC schematic and layout tools, this powerful suite of RF design and verification programs can improve the efficiency of the integrated-circuit design process. Mounir Adada, Kal Kalbasi, Jack Sifri | ED Online ID #6854 | November 2003 Design verification requires a full suite of circuit and device models, analysis tools, and simulated measurement capabilities. The RF Design Environment (RFDE), introduced in September 2002 as the first product developed as part of the alliance between Agilent Technologies (Santa Rosa, CA) and Cadence Design Systems (San Jose, CA), brought frequency-domain circuit simulation technology to mainstream silicon RF/analog/mixed-signal designers. Using tools long familiar to microwave designers, including harmonic-balance and circuit-envelope simulators, these silicon integrated-circuit (IC designers) were brought one step closer to true verification within the Cadence IC design flow. Now, with the release of RFDE 2003C, the second product from that alliance, the gap between RF circuit/system design and verification closed even further in two key areas: system-level verification of RF circuit performance to wireless standards, and physical-level modeling of high-frequency components and interconnects in the layout of an RF IC. With RFDE 2003C, wireless IC designers can now directly verify Cadence-based RF circuit schematics with modulated sources and measurements and pre-configured wireless test benches (WTB) based on current wireless standard specifications. Also, Cadence users can now generate accurate electromagnetic (EM) based models of passive on-chip components and interconnects using Momentum, a 2.5D method-of-moments-based simulation technology. These EM-based models are then simulated directly in the Cadence circuit schematic without the usual conversion to approximate lumped-element models, providing much greater accuracy for wireless and high-speed wire-line applications. Traditionally, RF and microwave designers were concerned with frequency-domain data such as S-parameters, power gain, output power at 1-dB compression (P1dB), noise figure, third-order intercept point (IP3), and VSWR, and were comfortable designing single function blocks with frequency-domain simulation tools. Analog/mixed-signal designers, on the other hand, were accustomed to using SPICE for data such as voltage gain, AC sweeps of voltage gain and impedance, and noise voltage. However, because of the need to meet tighter time-to-market schedules, modern analog/mixed-signal IC designers need these simulators in one environment. To perform a full design and analysis, frequency-domain simulation is a vital complement to time-domain simulation. The RFDE 2003C environment provides frequency-based simulators from within the industry-standard Cadence design environment. Harmonic Balance (HB) is a nonlinear frequency-domain simulator that rapidly analyzes multiple independent signals, no matter how closely spaced in frequency. Amplifier compression, harmonic distortion, oscillator spurious effects, phase noise, and mixer inter-modulation products are some of the analyses that HB is especially well suited for. The HB simulator from Agilent is a stable and robust technology that has benefited from continuous enhancements, making it the ideal analysis tool for large and highly nonlinear RF ICs. Enhancements include access to two different solvers (Direct and Krylov), three advanced pre-conditioners, memory waveform reduction techniques, and other advanced techniques (such as transient-assisted Harmonic Balance) for solving highly nonlinear circuits with digital content. Because it is a frequency-domain technique, distributed models are easily and accurately included. The HB simulator is most suitable for circuits with two or more large signal tones (multiple tones, frequency translation, mixers, detectors, multipliers). Frequencies need not be coperiodic. It is also well suited for high-Q circuits, dispersive circuits, ideal delays, transmission lines, microstrip lines, and N-port networks. For example, Fig. 1 shows a two-tone simulation on a mixer with 960-MHz local-oscillator (LO) frequency and 20-kHz separation of two tones centered at 1 MHz and swept from 1 to 20 MHz while maintaining the 20-kHz separation. Simulation outputs were extracted in less than 2 min. Output data includes output spectrum, conversion gain, and second and third-order intermodulation distortion (IMD). The same simulation would take at least 1000 times longer using a time-domain SPICE-type simulator. In highly nonlinear analog and RF circuits that might include flip-flops, switching devices, and frequency dividers, the HB simulator employs an advanced technique called transient-assisted HB (TaHB) to obtain a solution. First, a short transient simulation is run until a steady state output is reached. The solution is then transformed to the frequency domain and used as an initial guess for the HB simulator to converge into the final solution. In this case, output data include waveform, spectrum, and phase-noise plots, not available from just a time-domain simulation. The Circuit Envelope (CE) simulator is a mixed-domain simulator that efficiently analyses pseudorandom, digitally modulated signals found in modern wireless circuits. It samples the modulation envelope (amplitude and phase, or I and Q) of the carrier in the time domain and then calculates the discrete spectrum of the carrier and its harmonics for each envelope time sample. The main advantage of its mixed-frequency/time-domain approach is that it performs the simulation only in the relatively narrow frequency band that is occupied by the modulated signal. Unlike SPICE, it does not need to analyze the complete spectrum up to the maximum frequency set by the simulation period, resulting in enormous savings of calculation time (Fig. 2). The Circuit Envelope simulation output is a time-varying spectrum from which useful information, such as PLL frequency versus time data, adjacent-channel power ratio (ACPR), error vector magnitude (EVM), and noise power ratio (NPR) can be derived. Simulations can be performed on any user-specified orders of harmonics (5th, 7th, 9th, etc.), and all analyses can be carried out down to the transistor level. This simulator is well suited for analyzing I/Q modulators for such characteristics as modulation accuracy, frequency response, undesired leakage, IMD terms, efficiency, output power, modulator amplitude and phase accuracy, and EVM. Many of these analyses and simulations would be almost impossible to complete with a purely time-domain simulator such as SPICE. Other Circuit Envelope applications include pulsed signals, harmonic behavior during transient time, pseudorandom digitally modulated RF solutions, ACPR, EVM, and PAE simulation and optimization. The Circuit Envelope simulator can also handle a wide range of transient RF solutions, including PLL frequency versus time analysis (PLL lock time), analysis of automatic-gain-control (AGC) circuitry, PLL transient response (ringing, settling, and overshoot) simulation and optimization, and higher-order (5th, 7th, and 9th order) mixer intermodulation product analysis.
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