Differential or balanced devices are widely used in communications systems for their high immunity to noise. However, they can be difficult to integrate since the widely used S-parameter matching method cannot simply be applied. Fortunately, a generic method derived from the mixed-mode S-parameter concept can be used to match differential devices. It is simple and effective, as will be borne out by verification via four-port vector network analyzer (VNA) and analysis with electronic-design- automation (EDA) software.

Impedance matching is the practice of tuning a load impedance (Z) to the optimum impedance (Z_opt) of a connected device. It requires three main steps:
1. Finding Z_opt (the process is not detailed here but is usually achieved by tuning the load impedance of the circuit until the performance, i.e., the output power for a transmitter or the noise figure for a receiver, is met;
2. Measuring the Z that must be matched (this is done in the same way that the optimum impedance is measured); and
3. Determining the matching circuit that tunes Z to Z_opt. To perform impedance matching on an example twoport network (Fig. 1), a VNA was used to measure the RF impedance at the network’s ports, resulting in the singlemode S-parameter (S_sm) matrix of Eq. 1. The variables a1 and a2 represent incident waves while b₁ and b₂ represent reflected waves.

Equation 2 details the relationship between the S-parameters and impedance:

while Eq. 3 calculates the voltages and currents at the two nodes:

where v_i+ and i_i+ represent the forward voltage and current, respectively, and v_i– and i_i– represent the reverse voltage and current, respectively.

For differential circuits, S-parameter theory has been extended to introduce the concept of mixed modes.^1,2 Therefore, Fig. 1 could represent either a two-port single-ended circuit or a single-port mixed-mode circuit. The model has two modes of propagation: common mode and differential mode, which are also referred to as even and odd mode when considering each port separately. For both modes, incident waves a_c, a_d, and reflected waves b_c, b_d, a_s well as voltages and currents v_c, v_d, i_c, and i_d are defined using Equations 4 through 10.

then, as shown in Eq. 7, and

For the mixed-mode analysis, when referencing the signal to ground, the even and odd impedances (Z_e and Z_o) of each port are also defined. If the device structure is symmetrical, Z_e = 2Z_c and Z_o = Z_d /2. Mixed mode S-parameters are defined by:

and S_dd refers to the differential mode S-parameter needed to determine the differential impedance; S_cc is the common- mode parameter; and S_dc, S_cd are cross-mode parameters.

Each of the cross-mode parameters represent the amount of transfer from common to differential mode, and vice versa, that propagates through the circuit. For an ideal balanced circuit, mixed terms S_dc and S_cd are zero.

As part of achieving impedance matching, a goal is to determine the differential-mode circuit impedance Z_d. For this purpose, only the differential mode propagation must be evaluated (the common-mode propagation can be omitted). There is no RF common source (a_c = 0) even if the DC supply can be present on each side of the balanced port.

Bockelman et al.² demonstrates that mixed-mode parameters can be derived from-single mode parameters:

Therefore, Smm can be redefined as:

(See Equation 14)

Assuming the circuit shown in Fig. 1 is perfectly balanced, parameters S_II and S₂₂ are equal as are S_I2 and S_2I. Therefore, from Eq. 14, S_dc and S_cd are zero. Using Eq. 2, the differential impedance can be expressed as:

where Z0_d is the differential reference impedance and is defined by

From Eqs. 14 and 16, Z_d can be defined as Eq. 17.

The SKY65336-11 front-end module (FEM) from Skyworks Solutions served as an example of a device that might be matched in a differential arrangement. The normalized (50-Ohm reference) 2450- MHz single-mode S-parameters of the differential transmit input were measured and plugged into Eq. 1 to yield Eq. B.

Solving Eq. 12 for Sdd where the differential reference impedance, Z0d, is 100 Ohms yields S_dd = -0.361 + j0.374. Solving Eq. 17 for Z_d yields Z_d = 36.6 + j37.5 Ohms.

The differential-mode S-parameter, S_dd, was also simulated using the Advanced Design System (ADS) suite of simulation software programs from Agilent Technologies. Results were plotted on a Smith Chart (Fig. 2). The single-mode, Sparameters derived from the software simulation agreed with measurements using a four-port VNA.

The process of impedance matching involves tuning a device’s port impedance to a required impedance. The use of discrete inductors and capacitors is an easy way to achieve impedance matching. If area is not a constraint, using transmission lines and stub tuner elements is a cost-competitive alternate solution. This method provides a lower loss but is not as flexible as using discrete elements since new matching means a new printed-circuit-board (PCB) design.

Using a shunt element, a balanced circuit keeps its symmetry because the element is placed between two ports. When a series component is introduced, the circuit is no longer symmetrical. When lumped elements L and C are added to the balanced load, Z (S₁₁ and S₂₂ are equal), S_I'I' and S_2’2' of the matched load, Zopt, are now different (Fig. 3). Based on Eqs. 12 and 14, mixed terms S_dc and S_cd of the matched circuit are no longer null. The circuit symmetry can be easily realized by evaluating the impedance of the matched port, Z_opt, of circuit A in Fig. 4 which is given by:

(See Equation 18)

where X_C and X_L represent the impedance (purely imaginary) of the ideal capacitor and inductor, respectively.

Continue to page 2