Pulsed current-voltage (I-V) testing is becoming an invaluable method for evaluating the performance and reliability of semiconductor devices. The measurement approach is relatively cost effective and avoids the negative effects of self-heating and transient trapped charges, which can result in misleading test results. And pulsed I-V testing provides the accurate device data needed for improved computeraided- engineering (CAE) software models.

Pulsed I-V testing is based on the use of a pulsed source to stimulate a transistor or device under test (DUT), followed by a pulse measurement on the device. Since RF transistors are primarily used in applications where nonlinear responses are common, such as switches and amplifiers, large-signal analysis is typically the goal of pulsed I-V testing. The two main test methodologies are pulsed I-V sweeps and transient (singlepulse) testing (Fig. 1). By using a dual-channel pulse source/measurement system, this type of testing can be simply and cost-effectively performed.

Pulsed I-V measurement sweeps produce results similar to familiar DC tests, such as curves showing drain voltage VD and drain current)ID behavior under different bias conditions. This means the base of the pulses have a non-zero value for both gate and drain voltage, often referred to as the operating point or quiescent (q) point. The technique in this type of testing is application of a low-duty-cycle pulse (typically less than 1 percent duty cycle) to the DUT, to avoid self-heating and carrier-trapping effects. As shown in the left-hand side of Fig. 1, each point on the curve is the result of a pulse measurement made on the DUT during the settled or flat portion of the pulse. In practice, many pulse measurements are averaged to improve the quality of the overall measurement results.

The second type of pulsed I-V testing is the transient or single-pulse test (right-hand side of Fig. 1). In this case, the test results are presented as a view of the measurement pulse or an average of multiple pulses. The measured signal is plotted as the DUT’s voltage or current versus time, showing any time-varying changes, such as the onset of self-heating or charge trapping.

A wide range of pulse widths can be useful for performing pulsed I-V testing, depending on the DUT or material type and test parameters. For millisecond pulse widths, standard source-measure units (SMUs) can be used. However, shorter pulses (microseconds to nanoseconds) are generally more effective for avoiding selfheating and charge-trapping effects. Therefore, short-pulse pulsed I-V testing of RF transistors generally allows the creation of more useful models.

A useful dichotomy in describing RF transistor characterization is the distinction between small-signal and large-signal testing. Small-signal (Sparameter) data is useful for accurately representing linear devices, such as cables, filters, connectors, and couplers, i.e., devices governed by Maxwell’s equations, which produce linear responses with time and frequency. This means that S-parameter extractions require linear responses to feed the modeling process. In contrast, RF transistors are primarily used in applications where nonlinear responses are commonplace, so large-signal analysis is most useful for evaluating such devices under real-world conditions.

Various approaches are available for performing large-signal analysis, including the use of a large-signal vector network analyzer, non-50-ohm measurements, and pulsed I-V testing. Large-signal network analysis extends a measurement approach and instrumentation that is well characterized for small-signal measurements into the large-signal domain, where less history and documentation is available. A consensus on the theoretical basis of this methodology is still being developed, and the present installed base is relatively small. In addition, there are challenges in using the hardware to create and control the large signals that are required.

Two common approaches are used for testing RF transistors in non-50- ohm environments. The load pull approach uses a manual or programmable impedance tuner to vary the impedance at the output of the transistor (or other active device), then measures various performance parameters such as gain, compression, saturated power, efficiency, and linearity under those changing-impedance conditions. The output load is varied across several areas of the Smith Chart to achieve a full understanding of the device’s behavior. The sourcepull method varies the impedance seen at the input of the transistor while measuring the desired parameters, including the signal-to-noise ratio (SNR).

Pulsed I-V testing also permits the use of large signals and is fairly straightforward from a theoretical basis. The key advantage of pulse testing is the ability to leverage an extensive body of knowledge from DC modeling and analysis. In addition, it avoids self-heating and charge-trapping effects in the DUT. The three different large-signal analysis methodologies are not, in general, competitive and often, multiple approaches are used to characterize a DUT’s large-signal behavior.

Pulsed I-V testing carries with it certain requirements in terms of test techniques and instrument capabilities. These include:

• pulsing from a nonzero base or value (i.e., bias point/ quiescent point/DC offset);
• bias voltage pulsing of both the gate and drain;
• employing scaled-down test structures or devices, and lower power than the typical operating point for highpower RF transistors;
• using a current-sense resistor along with a software routine for load-line compensation;
• applying a software routine for cable and other interconnect compensation; and
• employing the appropriate tools to address system and device oscillation.

Fortunately, commercial instruments are available to provide all of the features needed for effective pulsed I-V device testing.

Figure 2 shows a nonzero bias point (the red lines on the right-hand side), also referred to as the quiescent point or q-point, based on pulsed I-V sweeps. The nonzero value, for both the device gate and drain, results in a point in the VD - ID plot marked by the red “X” in the left-hand side of Fig. 2. The pulse waveform as a nonzero base, represented by the red features in both sides of Fig. 2.

During an I-V sweep, the pulse height is varied as shown in the right diagram of Fig. 2. Measurements are made within the pulse as detailed by the black arrows on the right. The measurements are also shown in the left-hand side of Fig. 2, as black arrows pointing toward the measurements and away from the q-point. This indicates that the device is returned to the q-point condition between every measurement.

Figure 3 illustrates a pulsed I-V sweep in the testing of a depletionmode transistor. A depletion-mode transistor is normally on with 0 V bias at the gate, with a negative voltage applied to the gate to turn off the device. Pulsed I-V testing of a depletion- mode transistor requires a VG bias point that is negative to either partially or fully turn on the DUT. In Fig. 3, the device is turned on partially by using a small voltage for V_G and V_D. The V_G sweep starts at a negative voltage and sweeps to slightly above 0 V. Voltage V_D is swept from 0 to 27 V. This example also shows a negative bias point (q-point) for the gate, and a positive q-point for the drain. The pulse waveform, including the bias point (DC offset), is provided by the pulse instrumentation.

Pulsed I-V testing requires an instrument with dual-channel capabilities for comprehensive q-point testing, as shown for testing depletion-mode transistors. While it is possible to perform pulsed I-V testing with a DC bias on the transistor drain and pulse only the gate, this may not cover all DUT test conditions of interest. While a DC bias on the drain provides a simple test method, it does not allow a q-point value to be used for both the gate and drain when doing a VD-ID test, because the drain signal is always sweeping and is not at the VD bias point. To support full bias point operation, both the gate and drain must be pulsed simultaneously.

Many RF transistors are used for power amplification and may handle power levels to 200 W. A pulse source capable of this power level would be expensive. Therefore, to control costs and simplify testing requirements, the DUT is usually a scaled-down version of the transistor to be characterized (Fig. 4), although even a smaller device can require around 30 W of pulse power for pulsed I-V testing.

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